mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-06-06 18:53:16 +00:00
shader_recompiler: Small instruction parsing refactor/bugfixes (#340)
* translator: Implemtn f32 to f16 convert * shader_recompiler: Add bit instructions * shader_recompiler: More data share instructions * shader_recompiler: Remove exec contexts, fix S_MOV_B64 * shader_recompiler: Split instruction parsing into categories * shader_recompiler: Better BFS search * shader_recompiler: Constant propagation pass for cmp_class_f32 * shader_recompiler: Partial readfirstlane implementation * shader_recompiler: Stub readlane/writelane only for non-compute * hack: Fix swizzle on RDR * Will properly fix this when merging this * clang format * address_space: Bump user area size to full * shader_recompiler: V_INTERP_MOV_F32 * Should work the same as spirv will emit flat decoration on demand * kernel: Add MAP_OP_MAP_FLEXIBLE * image_view: Attempt to apply storage swizzle on format * vk_scheduler: Barrier attachments on renderpass end * clang format * liverpool: cs state backup * shader_recompiler: More instructions and formats * vector_alu: Proper V_MBCNT_U32_B32 * shader_recompiler: Port some dark souls things * file_system: Implement sceKernelRename * more formats * clang format * resource_tracking_pass: Back to assert * translate: Tracedata * kernel: Remove tracy lock * Solves random crashes in Dark Souls * code: Review comments
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66 changed files with 1349 additions and 904 deletions
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@ -403,9 +403,11 @@ Liverpool::Task Liverpool::ProcessGraphics(std::span<const u32> dcb, std::span<c
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vo_port->WaitVoLabel([&] { return wait_reg_mem->Test(); });
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}
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while (!wait_reg_mem->Test()) {
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mapped_queues[GfxQueueId].cs_state = regs.cs_program;
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TracyFiberLeave;
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co_yield {};
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TracyFiberEnter(dcb_task_name);
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regs.cs_program = mapped_queues[GfxQueueId].cs_state;
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}
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break;
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}
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@ -506,9 +508,11 @@ Liverpool::Task Liverpool::ProcessCompute(std::span<const u32> acb, int vqid) {
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const auto* wait_reg_mem = reinterpret_cast<const PM4CmdWaitRegMem*>(header);
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ASSERT(wait_reg_mem->engine.Value() == PM4CmdWaitRegMem::Engine::Me);
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while (!wait_reg_mem->Test()) {
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mapped_queues[vqid].cs_state = regs.cs_program;
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TracyFiberLeave;
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co_yield {};
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TracyFiberEnter(acb_task_name);
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regs.cs_program = mapped_queues[vqid].cs_state;
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}
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break;
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}
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@ -529,7 +533,6 @@ Liverpool::Task Liverpool::ProcessCompute(std::span<const u32> acb, int vqid) {
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}
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void Liverpool::SubmitGfx(std::span<const u32> dcb, std::span<const u32> ccb) {
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static constexpr u32 GfxQueueId = 0u;
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auto& queue = mapped_queues[GfxQueueId];
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auto task = ProcessGraphics(dcb, ccb);
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@ -36,6 +36,7 @@ namespace AmdGpu {
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[[maybe_unused]] std::array<u32, num_words> CONCAT2(pad, __LINE__)
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struct Liverpool {
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static constexpr u32 GfxQueueId = 0u;
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static constexpr u32 NumGfxRings = 1u; // actually 2, but HP is reserved by system software
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static constexpr u32 NumComputePipes = 7u; // actually 8, but #7 is reserved by system software
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static constexpr u32 NumQueuesPerPipe = 8u;
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@ -1061,6 +1062,7 @@ private:
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struct GpuQueue {
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std::mutex m_access{};
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std::queue<Task::Handle> submits{};
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ComputeProgram cs_state{};
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};
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std::array<GpuQueue, NumTotalQueues> mapped_queues{};
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@ -7,6 +7,77 @@
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namespace AmdGpu {
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std::string_view NameOf(DataFormat fmt) {
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switch (fmt) {
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case DataFormat::FormatInvalid:
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return "FormatInvalid";
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case DataFormat::Format8:
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return "Format8";
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case DataFormat::Format16:
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return "Format16";
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case DataFormat::Format8_8:
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return "Format8_8";
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case DataFormat::Format32:
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return "Format32";
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case DataFormat::Format16_16:
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return "Format16_16";
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case DataFormat::Format10_11_11:
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return "Format10_11_11";
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case DataFormat::Format11_11_10:
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return "Format11_11_10";
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case DataFormat::Format10_10_10_2:
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return "Format10_10_10_2";
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case DataFormat::Format2_10_10_10:
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return "Format2_10_10_10";
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case DataFormat::Format8_8_8_8:
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return "Format8_8_8_8";
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case DataFormat::Format32_32:
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return "Format32_32";
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case DataFormat::Format16_16_16_16:
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return "Format16_16_16_16";
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case DataFormat::Format32_32_32:
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return "Format32_32_32";
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case DataFormat::Format32_32_32_32:
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return "Format32_32_32_32";
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case DataFormat::Format5_6_5:
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return "Format5_6_5";
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case DataFormat::Format1_5_5_5:
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return "Format1_5_5_5";
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case DataFormat::Format5_5_5_1:
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return "Format5_5_5_1";
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case DataFormat::Format4_4_4_4:
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return "Format4_4_4_4";
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case DataFormat::Format8_24:
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return "Format8_24";
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case DataFormat::Format24_8:
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return "Format24_8";
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case DataFormat::FormatX24_8_32:
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return "FormatX24_8_32";
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case DataFormat::FormatGB_GR:
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return "FormatGB_GR";
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case DataFormat::FormatBG_RG:
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return "FormatBG_RG";
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case DataFormat::Format5_9_9_9:
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return "Format5_9_9_9";
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case DataFormat::FormatBc1:
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return "FormatBc1";
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case DataFormat::FormatBc2:
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return "FormatBc2";
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case DataFormat::FormatBc3:
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return "FormatBc3";
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case DataFormat::FormatBc4:
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return "FormatBc4";
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case DataFormat::FormatBc5:
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return "FormatBc5";
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case DataFormat::FormatBc6:
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return "FormatBc6";
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case DataFormat::FormatBc7:
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return "FormatBc7";
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default:
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UNREACHABLE();
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}
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}
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std::string_view NameOf(NumberFormat fmt) {
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switch (fmt) {
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case NumberFormat::Unorm:
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@ -61,6 +61,7 @@ enum class NumberFormat : u32 {
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Ubscaled = 13,
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};
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[[nodiscard]] std::string_view NameOf(DataFormat fmt);
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[[nodiscard]] std::string_view NameOf(NumberFormat fmt);
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int NumComponents(DataFormat format);
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@ -70,6 +71,16 @@ s32 ComponentOffset(DataFormat format, u32 comp);
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} // namespace AmdGpu
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template <>
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struct fmt::formatter<AmdGpu::DataFormat> {
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constexpr auto parse(format_parse_context& ctx) {
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return ctx.begin();
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}
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auto format(AmdGpu::DataFormat fmt, format_context& ctx) const {
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return fmt::format_to(ctx.out(), "{}", AmdGpu::NameOf(fmt));
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}
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};
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template <>
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struct fmt::formatter<AmdGpu::NumberFormat> {
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constexpr auto parse(format_parse_context& ctx) {
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@ -75,7 +75,7 @@ struct Buffer {
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static_assert(sizeof(Buffer) == 16); // 128bits
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enum class ImageType : u64 {
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Buffer = 0,
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Invalid = 0,
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Color1D = 8,
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Color2D = 9,
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Color3D = 10,
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@ -88,8 +88,8 @@ enum class ImageType : u64 {
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constexpr std::string_view NameOf(ImageType type) {
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switch (type) {
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case ImageType::Buffer:
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return "Buffer";
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case ImageType::Invalid:
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return "Invalid";
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case ImageType::Color1D:
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return "Color1D";
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case ImageType::Color2D:
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@ -179,6 +179,40 @@ struct Image {
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return base_address << 8;
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}
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u32 DstSelect() const {
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return dst_sel_x | (dst_sel_y << 3) | (dst_sel_z << 6) | (dst_sel_w << 9);
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}
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static char SelectComp(u32 sel) {
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switch (sel) {
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case 0:
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return '0';
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case 1:
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return '1';
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case 4:
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return 'R';
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case 5:
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return 'G';
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case 6:
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return 'B';
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case 7:
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return 'A';
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default:
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UNREACHABLE();
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}
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}
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std::string DstSelectName() const {
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std::string result = "[";
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u32 dst_sel = DstSelect();
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for (u32 i = 0; i < 4; i++) {
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result += SelectComp(dst_sel & 7);
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dst_sel >>= 3;
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}
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result += ']';
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return result;
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}
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u32 Pitch() const {
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return pitch + 1;
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}
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@ -290,6 +324,7 @@ enum class BorderColor : u64 {
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// Table 8.12 Sampler Resource Definition
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struct Sampler {
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union {
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u64 raw0;
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BitField<0, 3, ClampMode> clamp_x;
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BitField<3, 3, ClampMode> clamp_y;
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BitField<6, 3, ClampMode> clamp_z;
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BitField<60, 4, u64> perf_z;
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};
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union {
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u64 raw1;
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BitField<0, 14, u64> lod_bias;
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BitField<14, 6, u64> lod_bias_sec;
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BitField<20, 2, Filter> xy_mag_filter;
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BitField<62, 2, BorderColor> border_color_type;
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};
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operator bool() const noexcept {
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return raw0 != 0 || raw1 != 0;
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}
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float LodBias() const noexcept {
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return static_cast<float>(static_cast<int16_t>((lod_bias.Value() ^ 0x2000u) - 0x2000u)) /
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256.0f;
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