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Implement V_MOVREL variants (#745)

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* shader_recompiler: Implement V_MOVRELS_B32, V_MOVRELD_B32,
V_MOVRELSD_B32

Generates a ton of OpSelects to hardcode reading or writing from each
possible vgpr depending on the value of m0

Future work is to do range analysis to put an upper bound on m0 and
check fewer registers.

* fix runtime info after rebase
This commit is contained in:
baggins183 2024-09-06 13:47:47 -07:00 • committed by GitHub
parent 416e23fe76
commit bb29224daf
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11 changed files with 110 additions and 6 deletions
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8
src/shader_recompiler/ir/ir_emitter.cpp
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@ -217,6 +217,10 @@ U32 IREmitter::GetVccHi() {
return Inst<U32>(Opcode::GetVccHi);
}
U32 IREmitter::GetM0() {
return Inst<U32>(Opcode::GetM0);
}
void IREmitter::SetScc(const U1& value) {
Inst(Opcode::SetScc, value);
}
@ -241,6 +245,10 @@ void IREmitter::SetVccHi(const U32& value) {
Inst(Opcode::SetVccHi, value);
}
void IREmitter::SetM0(const U32& value) {
Inst(Opcode::SetM0, value);
}
F32 IREmitter::GetAttribute(IR::Attribute attribute, u32 comp) {
return Inst<F32>(Opcode::GetAttribute, attribute, Imm32(comp));
}