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video_core: Bloodborne stabilization pt1 (#543)
* shader_recompiler: Writelane elimination pass + null image fix * spirv: Implement image derivatives * texture_cache: Reduce page bit size * clang format * slot_vector: Back to debug assert * vk_graphics_pipeline: Handle null tsharp * spirv: Revert some change * vk_instance: Support primitive restart on list topology * page_manager: Adjust windows exception handler * clang format * Remove subres tracking * Will be done separately
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25 changed files with 187 additions and 107 deletions
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@ -345,6 +345,7 @@ SharpLocation TrackSharp(const IR::Inst* inst) {
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// Retrieve SGPR pair that holds sbase
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const auto pred1 = [](const IR::Inst* inst) -> std::optional<IR::ScalarReg> {
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ASSERT(inst->GetOpcode() != IR::Opcode::ReadConst);
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if (inst->GetOpcode() == IR::Opcode::GetUserData) {
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return inst->Arg(0).ScalarReg();
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}
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@ -402,24 +403,13 @@ s32 TryHandleInlineCbuf(IR::Inst& inst, Info& info, Descriptors& descriptors,
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// is used to define an inline constant buffer
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IR::Inst* handle = inst.Arg(0).InstRecursive();
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IR::Inst* p0 = handle->Arg(0).InstRecursive();
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if (p0->GetOpcode() != IR::Opcode::IAdd32 || !p0->Arg(0).IsImmediate() ||
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!p0->Arg(1).IsImmediate()) {
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return -1;
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}
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IR::Inst* p1 = handle->Arg(1).InstRecursive();
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if (p1->GetOpcode() != IR::Opcode::IAdd32) {
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return -1;
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}
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if (!handle->Arg(3).IsImmediate() || !handle->Arg(2).IsImmediate()) {
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if (!handle->AreAllArgsImmediates()) {
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return -1;
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}
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// We have found this pattern. Build the sharp.
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std::array<u32, 4> buffer;
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buffer[0] = info.pgm_base + p0->Arg(0).U32() + p0->Arg(1).U32();
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buffer[1] = 0;
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buffer[2] = handle->Arg(2).U32();
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buffer[3] = handle->Arg(3).U32();
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std::array<u64, 2> buffer;
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buffer[0] = info.pgm_base + (handle->Arg(0).U32() | u64(handle->Arg(1).U32()) << 32);
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buffer[1] = handle->Arg(2).U32() | u64(handle->Arg(3).U32()) << 32;
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cbuf = std::bit_cast<AmdGpu::Buffer>(buffer);
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// Assign a binding to this sharp.
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return descriptors.Add(BufferResource{
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@ -617,7 +607,11 @@ void PatchImageInstruction(IR::Block& block, IR::Inst& inst, Info& info, Descrip
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const IR::Value arg = inst.Arg(arg_pos);
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ASSERT_MSG(arg.Type() == IR::Type::U32, "Unexpected offset type");
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const auto read = [&](u32 offset) -> auto {
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const auto read = [&](u32 offset) -> IR::U32 {
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if (arg.IsImmediate()) {
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const u16 comp = (arg.U32() >> offset) & 0x3F;
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return ir.Imm32(s32(comp << 26) >> 26);
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}
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return ir.BitFieldExtract(IR::U32{arg}, ir.Imm32(offset), ir.Imm32(6), true);
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};
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@ -637,7 +631,10 @@ void PatchImageInstruction(IR::Block& block, IR::Inst& inst, Info& info, Descrip
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UNREACHABLE();
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}
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}
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if (inst_info.has_derivatives) {
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ASSERT_MSG(image.GetType() == AmdGpu::ImageType::Color2D,
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"User derivatives only supported for 2D images");
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}
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if (inst_info.has_lod_clamp) {
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const u32 arg_pos = [&]() -> u32 {
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switch (inst.GetOpcode()) {
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