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fix: Correct number of allocated VGPRs.

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squidbus 2025-02-12 17:53:42 -08:00
parent 5f2467b453
commit c9d425dc08
2 changed files with 6 additions and 1 deletions
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5
src/video_core/amdgpu/liverpool.h
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@ -143,6 +143,11 @@ struct Liverpool {
const u32 num_dwords = bininfo.length / sizeof(u32); const u32 num_dwords = bininfo.length / sizeof(u32);
return std::span{code, num_dwords}; return std::span{code, num_dwords};
} }
[[nodiscard]] u32 NumVgprs() const {
// Each increment allocates 4 registers, where 0 = 4 registers.
return (settings.num_vgprs + 1) * 4;
}
}; };
struct HsTessFactorClamp { struct HsTessFactorClamp {

2
src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
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@ -84,7 +84,7 @@ const Shader::RuntimeInfo& PipelineCache::BuildRuntimeInfo(Stage stage, LogicalS
const auto BuildCommon = [&](const auto& program) { const auto BuildCommon = [&](const auto& program) {
info.num_user_data = program.settings.num_user_regs; info.num_user_data = program.settings.num_user_regs;
info.num_input_vgprs = program.settings.vgpr_comp_cnt; info.num_input_vgprs = program.settings.vgpr_comp_cnt;
info.num_allocated_vgprs = program.settings.num_vgprs * 4; info.num_allocated_vgprs = program.NumVgprs();
info.fp_denorm_mode32 = program.settings.fp_denorm_mode32; info.fp_denorm_mode32 = program.settings.fp_denorm_mode32;
info.fp_round_mode32 = program.settings.fp_round_mode32; info.fp_round_mode32 = program.settings.fp_round_mode32;
}; };