From d48836d5ae5de4c01f914a98d0c95a1b3d0115ec Mon Sep 17 00:00:00 2001
From: squidbus <175574877+squidbus@users.noreply.github.com>
Date: Tue, 3 Sep 2024 11:37:52 -0700
Subject: [PATCH] shader_recompiler: Limit src0 to 4-bit in V_CVT_OFF_F32_I4
 (#759)

---
 src/shader_recompiler/frontend/translate/vector_alu.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/shader_recompiler/frontend/translate/vector_alu.cpp b/src/shader_recompiler/frontend/translate/vector_alu.cpp
index 5d306b295..a07e70785 100644
--- a/src/shader_recompiler/frontend/translate/vector_alu.cpp
+++ b/src/shader_recompiler/frontend/translate/vector_alu.cpp
@@ -483,7 +483,7 @@ void Translator::V_CVT_OFF_F32_I4(const GcnInst& inst) {
     static constexpr std::array IntToFloat = {
         0.0f,     0.0625f,  0.1250f,  0.1875f,  0.2500f,  0.3125f,  0.3750f,  0.4375f,
         -0.5000f, -0.4375f, -0.3750f, -0.3125f, -0.2500f, -0.1875f, -0.1250f, -0.0625f};
-    ir.SetVectorReg(dst_reg, ir.Imm32(IntToFloat[src0.U32()]));
+    ir.SetVectorReg(dst_reg, ir.Imm32(IntToFloat[src0.U32() & 0xF]));
 }
 
 void Translator::V_MED3_F32(const GcnInst& inst) {