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amdgpu: tiling mode introduced
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parent
d7d324ac76
commit
d491bbf366
4 changed files with 44 additions and 7 deletions
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@ -6,6 +6,7 @@
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#include "common/assert.h"
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#include "common/bit_field.h"
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#include "common/types.h"
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#include "resource.h"
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#include "video_core/amdgpu/pixel_format.h"
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#include <array>
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@ -622,7 +623,7 @@ struct Liverpool {
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BitField<19, 1, u32> cmask_is_linear;
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} info;
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union {
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BitField<0, 5, u32> tile_mode_index;
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BitField<0, 5, TilingMode> tile_mode_index;
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BitField<5, 5, u32> fmask_tile_mode_index;
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BitField<12, 3, u32> num_samples_log2;
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BitField<15, 3, u32> num_fragments_log2;
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@ -661,6 +662,22 @@ struct Liverpool {
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return u64(cmask_base_address) << 8;
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}
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[[nodiscard]] size_t GetSizeAligned() const {
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const auto num_bytes_per_element = NumBits(info.format) / 8u;
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const auto slice_size = (slice.tile_max + 1) * 64u;
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const auto total_size = slice_size * (view.slice_max + 1) * num_bytes_per_element;
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ASSERT(total_size > 0);
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return total_size;
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}
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[[nodiscard]] TilingMode GetTilingMode() const {
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return attrib.tile_mode_index;
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}
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[[nodiscard]] bool IsTiled() const {
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return !info.linear_general;
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}
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NumberFormat NumFormat() const {
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// There is a small difference between T# and CB number types, account for it.
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return info.number_type == AmdGpu::NumberFormat::Uscaled ? AmdGpu::NumberFormat::Srgb
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