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amdgpu: tiling mode introduced
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parent
d7d324ac76
commit
d491bbf366
4 changed files with 44 additions and 7 deletions
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@ -86,18 +86,19 @@ ImageInfo::ImageInfo(const Libraries::VideoOut::BufferAttributeGroup& group) noe
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ImageInfo::ImageInfo(const AmdGpu::Liverpool::ColorBuffer& buffer,
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const AmdGpu::Liverpool::CbDbExtent& hint /*= {}*/) noexcept {
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is_tiled = true;
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is_tiled = buffer.IsTiled();
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pixel_format = LiverpoolToVK::SurfaceFormat(buffer.info.format, buffer.NumFormat());
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type = vk::ImageType::e2D;
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size.width = hint.Valid() ? hint.width : buffer.Pitch();
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size.height = hint.Valid() ? hint.height : buffer.Height();
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size.depth = 1;
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pitch = size.width;
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guest_size_bytes = buffer.slice.tile_max * (buffer.view.slice_max + 1);
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guest_size_bytes = buffer.GetSizeAligned();
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}
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ImageInfo::ImageInfo(const AmdGpu::Image& image) noexcept {
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is_tiled = false;
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is_tiled = image.IsTiled();
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tiling_mode = image.GetTilingMode();
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pixel_format = LiverpoolToVK::SurfaceFormat(image.GetDataFmt(), image.GetNumberFmt());
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type = ConvertImageType(image.type);
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size.width = image.width + 1;
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@ -106,8 +107,7 @@ ImageInfo::ImageInfo(const AmdGpu::Image& image) noexcept {
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pitch = image.Pitch();
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resources.levels = image.NumLevels();
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resources.layers = image.NumLayers();
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// TODO: Derive this properly from tiling params
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guest_size_bytes = size.width * size.height * 4;
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guest_size_bytes = image.GetSizeAligned();
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}
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UniqueImage::UniqueImage(vk::Device device_, VmaAllocator allocator_)
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@ -45,6 +45,7 @@ struct ImageInfo {
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Extent3D size{1, 1, 1};
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u32 pitch = 0;
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u32 guest_size_bytes = 0;
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AmdGpu::TilingMode tiling_mode{AmdGpu::TilingMode::Display_Linear};
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};
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struct UniqueImage {
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