mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-05-18 09:24:58 +00:00
video_core: Add image support
This commit is contained in:
parent
729e166cd3
commit
d59b102b6f
48 changed files with 1264 additions and 259 deletions
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@ -218,8 +218,8 @@ void PatchPhiNodes(IR::Program& program, EmitContext& ctx) {
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}
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} // Anonymous namespace
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std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program, Bindings& bindings) {
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EmitContext ctx{profile, program, bindings};
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std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program, u32& binding) {
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EmitContext ctx{profile, program, binding};
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const Id main{DefineMain(ctx, program)};
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DefineEntryPoint(program, ctx, main);
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if (program.info.stage == Stage::Vertex) {
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@ -4,18 +4,12 @@
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#pragma once
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#include <vector>
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#include "shader_recompiler/backend/bindings.h"
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#include "shader_recompiler/ir/program.h"
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#include "shader_recompiler/profile.h"
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namespace Shader::Backend::SPIRV {
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[[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program,
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Bindings& bindings);
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[[nodiscard]] inline std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program) {
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Bindings binding;
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return EmitSPIRV(profile, program, binding);
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}
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u32& binding);
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} // namespace Shader::Backend::SPIRV
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@ -61,14 +61,11 @@ Id EmitReadConst(EmitContext& ctx) {
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throw LogicError("Unreachable instruction");
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}
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Id EmitReadConstBuffer(EmitContext& ctx, const IR::Value& binding, const IR::Value& addr,
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const IR::Value& offset) {
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throw LogicError("Unreachable instruction");
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}
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Id EmitReadConstBufferF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& addr,
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const IR::Value& offset) {
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throw LogicError("Unreachable instruction");
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Id EmitReadConstBuffer(EmitContext& ctx, u32 handle, Id index) {
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const Id buffer = ctx.buffers[handle];
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const Id type = ctx.info.buffers[handle].is_storage ? ctx.storage_f32 : ctx.uniform_f32;
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const Id ptr{ctx.OpAccessChain(type, buffer, ctx.ConstU32(0U), index)};
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return ctx.OpLoad(ctx.F32[1], ptr);
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}
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Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, u32 comp) {
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@ -99,32 +96,28 @@ void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, Id value, u32 elemen
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ctx.OpStore(pointer, value);
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}
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Id EmitLoadBufferF32(EmitContext& ctx, IR::Inst* inst, const IR::Value& handle,
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const IR::Value& address) {
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Id EmitLoadBufferF32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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UNREACHABLE();
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}
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Id EmitLoadBufferF32x2(EmitContext& ctx, IR::Inst* inst, const IR::Value& handle,
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const IR::Value& address) {
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Id EmitLoadBufferF32x2(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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UNREACHABLE();
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}
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Id EmitLoadBufferF32x3(EmitContext& ctx, IR::Inst* inst, const IR::Value& handle,
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const IR::Value& address) {
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Id EmitLoadBufferF32x3(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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UNREACHABLE();
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}
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Id EmitLoadBufferF32x4(EmitContext& ctx, IR::Inst* inst, const IR::Value& handle,
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const IR::Value& address) {
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Id EmitLoadBufferF32x4(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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const auto info = inst->Flags<IR::BufferInstInfo>();
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const Id buffer = ctx.buffers[handle.U32()];
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const Id type = ctx.info.buffers[handle.U32()].is_storage ? ctx.storage_f32 : ctx.uniform_f32;
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const Id buffer = ctx.buffers[handle];
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const Id type = ctx.info.buffers[handle].is_storage ? ctx.storage_f32 : ctx.uniform_f32;
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if (info.index_enable && info.offset_enable) {
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UNREACHABLE();
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} else if (info.index_enable) {
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boost::container::static_vector<Id, 4> ids;
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for (u32 i = 0; i < 4; i++) {
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const Id index{ctx.OpIAdd(ctx.U32[1], ctx.Def(address), ctx.ConstU32(i))};
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const Id index{ctx.OpIAdd(ctx.U32[1], address, ctx.ConstU32(i))};
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const Id ptr{ctx.OpAccessChain(type, buffer, ctx.ConstU32(0U), index)};
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ids.push_back(ctx.OpLoad(ctx.F32[1], ptr));
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}
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@ -6,9 +6,14 @@
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namespace Shader::Backend::SPIRV {
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Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id bias_lc, const IR::Value& offset) {
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throw NotImplementedException("SPIR-V Instruction");
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Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
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Id offset) {
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const auto& texture = ctx.images[handle & 0xFFFF];
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const Id image = ctx.OpLoad(texture.image_type, texture.id);
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const Id sampler = ctx.OpLoad(ctx.sampler_type, ctx.samplers[handle >> 16]);
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const Id sampled_image = ctx.OpSampledImage(texture.sampled_type, image, sampler);
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const auto info = inst->Flags<IR::TextureInstInfo>();
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return ctx.OpImageSampleImplicitLod(ctx.F32[4], sampled_image, coords);
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}
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Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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@ -43,18 +43,11 @@ void EmitSetGotoVariable(EmitContext& ctx);
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void EmitGetGotoVariable(EmitContext& ctx);
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void EmitSetScc(EmitContext& ctx);
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Id EmitReadConst(EmitContext& ctx);
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Id EmitReadConstBuffer(EmitContext& ctx, const IR::Value& handle, const IR::Value& index,
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const IR::Value& offset);
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Id EmitReadConstBufferF32(EmitContext& ctx, const IR::Value& handle, const IR::Value& index,
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const IR::Value& offset);
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Id EmitLoadBufferF32(EmitContext& ctx, IR::Inst* inst, const IR::Value& handle,
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const IR::Value& address);
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Id EmitLoadBufferF32x2(EmitContext& ctx, IR::Inst* inst, const IR::Value& handle,
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const IR::Value& address);
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Id EmitLoadBufferF32x3(EmitContext& ctx, IR::Inst* inst, const IR::Value& handle,
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const IR::Value& address);
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Id EmitLoadBufferF32x4(EmitContext& ctx, IR::Inst* inst, const IR::Value& handle,
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const IR::Value& address);
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Id EmitReadConstBuffer(EmitContext& ctx, u32 handle, Id index);
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Id EmitLoadBufferF32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address);
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Id EmitLoadBufferF32x2(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address);
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Id EmitLoadBufferF32x3(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address);
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Id EmitLoadBufferF32x4(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address);
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Id EmitGetAttribute(EmitContext& ctx, IR::Attribute attr, u32 comp);
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Id EmitGetAttributeU32(EmitContext& ctx, IR::Attribute attr, u32 comp);
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void EmitSetAttribute(EmitContext& ctx, IR::Attribute attr, Id value, u32 comp);
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@ -319,8 +312,8 @@ Id EmitConvertF64U16(EmitContext& ctx, Id value);
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Id EmitConvertF64U32(EmitContext& ctx, Id value);
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Id EmitConvertF64U64(EmitContext& ctx, Id value);
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Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id bias_lc, const IR::Value& offset);
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Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
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Id offset);
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Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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Id lod, const IR::Value& offset);
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Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index,
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@ -35,17 +35,14 @@ void Name(EmitContext& ctx, Id object, std::string_view format_str, Args&&... ar
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} // Anonymous namespace
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EmitContext::EmitContext(const Profile& profile_, IR::Program& program, Bindings& bindings)
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EmitContext::EmitContext(const Profile& profile_, IR::Program& program, u32& binding_)
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: Sirit::Module(profile_.supported_spirv), info{program.info}, profile{profile_},
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stage{program.info.stage} {
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u32& uniform_binding{bindings.unified};
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u32& storage_binding{bindings.unified};
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u32& texture_binding{bindings.unified};
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u32& image_binding{bindings.unified};
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stage{program.info.stage}, binding{binding_} {
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AddCapability(spv::Capability::Shader);
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DefineArithmeticTypes();
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DefineInterfaces(program);
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DefineBuffers(program.info);
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DefineImagesAndSamplers(program.info);
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}
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EmitContext::~EmitContext() = default;
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@ -235,16 +232,15 @@ void EmitContext::DefineOutputs(const Info& info) {
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}
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void EmitContext::DefineBuffers(const Info& info) {
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const auto define_buffer = [&](const BufferResource& buffer, Id type, u32 element_size,
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char type_char, u32 index) {
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ASSERT(buffer.stride % element_size == 0);
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const u32 num_elements = buffer.stride * buffer.num_records / element_size;
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for (u32 i = 0; const auto& buffer : info.buffers) {
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ASSERT(True(buffer.used_types & IR::Type::F32));
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ASSERT(buffer.stride % sizeof(float) == 0);
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const u32 num_elements = buffer.stride * buffer.num_records / sizeof(float);
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const Id record_array_type{TypeArray(F32[1], ConstU32(num_elements))};
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Decorate(record_array_type, spv::Decoration::ArrayStride, element_size);
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Decorate(record_array_type, spv::Decoration::ArrayStride, sizeof(float));
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const Id struct_type{TypeStruct(record_array_type)};
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const auto name =
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fmt::format("{}_cbuf_block_{}{}", stage, type_char, element_size * CHAR_BIT);
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const auto name = fmt::format("{}_cbuf_block_{}{}", stage, 'f', sizeof(float) * CHAR_BIT);
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Name(struct_type, name);
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Decorate(struct_type, spv::Decoration::Block);
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MemberName(struct_type, 0, "data");
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@ -254,25 +250,112 @@ void EmitContext::DefineBuffers(const Info& info) {
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buffer.is_storage ? spv::StorageClass::StorageBuffer : spv::StorageClass::Uniform;
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const Id struct_pointer_type{TypePointer(storage_class, struct_type)};
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if (buffer.is_storage) {
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storage_f32 = TypePointer(storage_class, type);
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storage_f32 = TypePointer(storage_class, F32[1]);
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} else {
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uniform_f32 = TypePointer(storage_class, type);
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uniform_f32 = TypePointer(storage_class, F32[1]);
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}
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const Id id{AddGlobalVariable(struct_pointer_type, storage_class)};
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Decorate(id, spv::Decoration::Binding, binding);
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Decorate(id, spv::Decoration::DescriptorSet, 0U);
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Name(id, fmt::format("c{}", index));
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Name(id, fmt::format("c{}", i));
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binding++;
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buffers.push_back(id);
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interfaces.push_back(id);
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};
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for (u32 i = 0; const auto& buffer : info.buffers) {
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ASSERT(True(buffer.used_types & IR::Type::F32));
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define_buffer(buffer, F32[1], 4, 'f', i);
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i++;
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}
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}
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Id ImageType(EmitContext& ctx, const ImageResource& desc) {
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const spv::ImageFormat format{spv::ImageFormat::Unknown};
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const Id type{ctx.F32[1]};
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const bool depth{desc.is_depth};
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switch (desc.type) {
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case AmdGpu::ImageType::Color1D:
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return ctx.TypeImage(type, spv::Dim::Dim1D, depth, false, false, 1, format,
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spv::AccessQualifier::ReadOnly);
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case AmdGpu::ImageType::Color1DArray:
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return ctx.TypeImage(type, spv::Dim::Dim1D, depth, true, false, 1, format,
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spv::AccessQualifier::ReadOnly);
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case AmdGpu::ImageType::Color2D:
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case AmdGpu::ImageType::Color2DMsaa:
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return ctx.TypeImage(type, spv::Dim::Dim2D, depth, false,
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desc.type == AmdGpu::ImageType::Color2DMsaa, 1, format,
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spv::AccessQualifier::ReadOnly);
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case AmdGpu::ImageType::Color2DArray:
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case AmdGpu::ImageType::Color2DMsaaArray:
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return ctx.TypeImage(type, spv::Dim::Dim2D, depth, true,
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desc.type == AmdGpu::ImageType::Color2DMsaaArray, 1, format,
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spv::AccessQualifier::ReadOnly);
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case AmdGpu::ImageType::Color3D:
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return ctx.TypeImage(type, spv::Dim::Dim3D, depth, false, false, 1, format,
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spv::AccessQualifier::ReadOnly);
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case AmdGpu::ImageType::Cube:
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return ctx.TypeImage(type, spv::Dim::Cube, depth, false, false, 1, format,
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spv::AccessQualifier::ReadOnly);
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case AmdGpu::ImageType::Buffer:
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break;
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}
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throw InvalidArgument("Invalid texture type {}", desc.type);
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}
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Id ImageType(EmitContext& ctx, const ImageResource& desc, Id sampled_type) {
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const auto format = spv::ImageFormat::Unknown; // Read this from tsharp?
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switch (desc.type) {
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case AmdGpu::ImageType::Color1D:
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return ctx.TypeImage(sampled_type, spv::Dim::Dim1D, false, false, false, 1, format);
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case AmdGpu::ImageType::Color1DArray:
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return ctx.TypeImage(sampled_type, spv::Dim::Dim1D, false, true, false, 1, format);
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case AmdGpu::ImageType::Color2D:
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return ctx.TypeImage(sampled_type, spv::Dim::Dim2D, false, false, false, 1, format);
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case AmdGpu::ImageType::Color2DArray:
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return ctx.TypeImage(sampled_type, spv::Dim::Dim2D, false, true, false, 1, format);
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case AmdGpu::ImageType::Color3D:
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return ctx.TypeImage(sampled_type, spv::Dim::Dim3D, false, false, false, 2, format);
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case AmdGpu::ImageType::Buffer:
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throw NotImplementedException("Image buffer");
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default:
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break;
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}
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throw InvalidArgument("Invalid texture type {}", desc.type);
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}
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void EmitContext::DefineImagesAndSamplers(const Info& info) {
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for (const auto& image_desc : info.images) {
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const Id sampled_type{image_desc.nfmt == AmdGpu::NumberFormat::Uint ? U32[1] : F32[1]};
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const Id image_type{ImageType(*this, image_desc, sampled_type)};
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const Id pointer_type{TypePointer(spv::StorageClass::UniformConstant, image_type)};
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const Id id{AddGlobalVariable(pointer_type, spv::StorageClass::UniformConstant)};
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Decorate(id, spv::Decoration::Binding, binding);
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Decorate(id, spv::Decoration::DescriptorSet, 0U);
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Name(id, fmt::format("{}_{}{}_{:02x}", stage, "img", image_desc.sgpr_base,
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image_desc.dword_offset));
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images.push_back({
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.id = id,
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.sampled_type = TypeSampledImage(image_type),
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.pointer_type = pointer_type,
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.image_type = image_type,
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});
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interfaces.push_back(id);
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++binding;
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}
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if (info.samplers.empty()) {
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return;
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}
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sampler_type = TypeSampler();
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sampler_pointer_type = TypePointer(spv::StorageClass::UniformConstant, sampler_type);
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for (const auto& samp_desc : info.samplers) {
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const Id id{AddGlobalVariable(sampler_pointer_type, spv::StorageClass::UniformConstant)};
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Decorate(id, spv::Decoration::Binding, binding);
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Decorate(id, spv::Decoration::DescriptorSet, 0U);
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Name(id, fmt::format("{}_{}{}_{:02x}", stage, "samp", samp_desc.sgpr_base,
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samp_desc.dword_offset));
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samplers.push_back(id);
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interfaces.push_back(id);
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++binding;
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}
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}
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} // namespace Shader::Backend::SPIRV
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@ -6,7 +6,6 @@
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#include <array>
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#include <sirit/sirit.h>
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#include "shader_recompiler/backend/bindings.h"
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#include "shader_recompiler/ir/program.h"
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#include "shader_recompiler/profile.h"
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#include "shader_recompiler/runtime_info.h"
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@ -29,7 +28,7 @@ struct VectorIds {
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class EmitContext final : public Sirit::Module {
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public:
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explicit EmitContext(const Profile& profile, IR::Program& program, Bindings& binding);
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explicit EmitContext(const Profile& profile, IR::Program& program, u32& binding);
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~EmitContext();
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Id Def(const IR::Value& value);
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@ -152,8 +151,20 @@ public:
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Id base_vertex{};
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std::array<Id, 8> frag_color{};
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u32 binding{};
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struct TextureDefinition {
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Id id;
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Id sampled_type;
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Id pointer_type;
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Id image_type;
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};
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u32& binding;
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boost::container::small_vector<Id, 4> buffers;
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boost::container::small_vector<TextureDefinition, 4> images;
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boost::container::small_vector<Id, 4> samplers;
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Id sampler_type{};
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Id sampler_pointer_type{};
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struct SpirvAttribute {
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Id id;
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@ -170,6 +181,7 @@ private:
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void DefineInputs(const Info& info);
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void DefineOutputs(const Info& info);
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void DefineBuffers(const Info& info);
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void DefineImagesAndSamplers(const Info& info);
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SpirvAttribute GetAttributeInfo(AmdGpu::NumberFormat fmt, Id id);
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};
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