mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-05-31 15:53:17 +00:00
video_core: Add image support
This commit is contained in:
raphaelthegreat
parent
729e166cd3
commit
d59b102b6f
48 changed files with 1264 additions and 259 deletions
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@ -63,6 +63,16 @@ struct Liverpool {
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const uintptr_t addr = uintptr_t(address_hi) << 40 | uintptr_t(address_lo) << 8;
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return reinterpret_cast<const T*>(addr);
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}
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std::span<const u32> Code() const {
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u32 code_size = 1;
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const u32* code = Address<u32>();
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static constexpr std::string_view PostHeader = "OrbShdr";
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while (std::memcmp(code + code_size, PostHeader.data(), PostHeader.size()) != 0) {
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code_size++;
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}
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return std::span{code, code_size};
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}
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};
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union PsInputControl {
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@ -228,7 +238,7 @@ struct Liverpool {
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enum class ZFormat : u32 {
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Invald = 0,
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Z16 = 1,
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Z32Float = 2,
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Z32Float = 3,
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};
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enum class StencilFormat : u32 {
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@ -353,8 +363,9 @@ struct Liverpool {
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BitField<0, 8, u32> base_addr_hi;
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u32 base_addr_lo;
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VAddr Address() const {
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return base_addr_lo | u64(base_addr_hi) << 32;
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template <typename T = VAddr>
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T Address() const {
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return reinterpret_cast<T>(base_addr_lo | u64(base_addr_hi) << 32);
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}
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};
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@ -448,6 +459,53 @@ struct Liverpool {
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u32 data_w;
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};
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struct BlendConstants {
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float red;
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float green;
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float blue;
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float alpha;
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};
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union BlendControl {
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enum class BlendFactor : u32 {
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Zero = 0,
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One = 1,
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SrcColor = 2,
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OneMinusSrcColor = 3,
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SrcAlpha = 4,
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OneMinusSrcAlpha = 5,
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DstAlpha = 6,
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OneMinusDstAlpha = 7,
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DstColor = 8,
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OneMinusDstColor = 9,
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SrcAlphaSaturate = 10,
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ConstantColor = 13,
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OneMinusConstantColor = 14,
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Src1Color = 15,
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InvSrc1Color = 16,
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Src1Alpha = 17,
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InvSrc1Alpha = 18,
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ConstantAlpha = 19,
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OneMinusConstantAlpha = 20,
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};
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enum class BlendFunc : u32 {
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Add = 0,
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Subtract = 1,
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Min = 2,
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Max = 3,
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};
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BitField<0, 5, BlendFactor> color_src_factor;
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BitField<5, 3, BlendFunc> color_func;
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BitField<8, 5, BlendFactor> color_dst_factor;
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BitField<16, 5, BlendFactor> alpha_src_factor;
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BitField<21, 3, BlendFunc> alpha_func;
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BitField<24, 5, BlendFactor> alpha_dst_factor;
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BitField<29, 1, u32> separate_alpha_blend;
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BitField<30, 1, u32> enable;
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};
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struct ColorBuffer {
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enum class EndianSwap : u32 {
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None = 0,
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@ -577,7 +635,9 @@ struct Liverpool {
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INSERT_PADDING_WORDS(0xA094 - 0xA08E - 2);
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std::array<ViewportScissor, NumViewports> viewport_scissors;
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std::array<ViewportDepth, NumViewports> viewport_depths;
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INSERT_PADDING_WORDS(0xA10B - 0xA0D4);
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INSERT_PADDING_WORDS(0xA105 - 0xA0D4);
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BlendConstants blend_constants;
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INSERT_PADDING_WORDS(0xA10B - 0xA105 - 4);
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StencilControl stencil_control;
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StencilRefMask stencil_ref_front;
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StencilRefMask stencil_ref_back;
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@ -593,7 +653,9 @@ struct Liverpool {
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ShaderPosFormat shader_pos_format;
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ShaderExportFormat z_export_format;
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ColorExportFormat color_export_format;
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INSERT_PADDING_WORDS(0xA1F9 - 0xA1C3 - 3);
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INSERT_PADDING_WORDS(0xA1E0 - 0xA1C3 - 3);
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std::array<BlendControl, NumColorBuffers> blend_control;
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INSERT_PADDING_WORDS(0xA1F9 - 0xA1E0 - 8);
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IndexBufferBase index_base_address;
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INSERT_PADDING_WORDS(1);
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u32 draw_initiator;
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@ -732,6 +794,7 @@ static_assert(GFX6_3D_REG_INDEX(num_interp) == 0xA1B6);
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static_assert(GFX6_3D_REG_INDEX(shader_pos_format) == 0xA1C3);
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static_assert(GFX6_3D_REG_INDEX(z_export_format) == 0xA1C4);
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static_assert(GFX6_3D_REG_INDEX(color_export_format) == 0xA1C5);
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static_assert(GFX6_3D_REG_INDEX(blend_control) == 0xA1E0);
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static_assert(GFX6_3D_REG_INDEX(index_base_address) == 0xA1F9);
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static_assert(GFX6_3D_REG_INDEX(draw_initiator) == 0xA1FC);
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static_assert(GFX6_3D_REG_INDEX(clipper_control) == 0xA204);
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@ -31,4 +31,196 @@ struct Buffer {
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};
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};
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enum class ImageType : u64 {
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Buffer = 0,
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Color1D = 8,
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Color2D = 9,
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Color3D = 10,
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Cube = 11,
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Color1DArray = 12,
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Color2DArray = 13,
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Color2DMsaa = 14,
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Color2DMsaaArray = 15,
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};
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constexpr std::string_view NameOf(ImageType type) {
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switch (type) {
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case ImageType::Buffer:
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return "Buffer";
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case ImageType::Color1D:
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return "Color1D";
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case ImageType::Color2D:
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return "Color2D";
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case ImageType::Color3D:
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return "Color3D";
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case ImageType::Cube:
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return "Cube";
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case ImageType::Color1DArray:
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return "Color1DArray";
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case ImageType::Color2DArray:
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return "Color2DArray";
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case ImageType::Color2DMsaa:
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return "Color2DMsaa";
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case ImageType::Color2DMsaaArray:
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return "Color2DMsaaArray";
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default:
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return "Unknown";
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}
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}
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struct Image {
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union {
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BitField<0, 40, u64> base_address;
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BitField<40, 12, u64> min_lod;
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BitField<52, 6, u64> data_format;
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BitField<58, 4, u64> num_format;
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BitField<62, 2, u64> mtype;
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};
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union {
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BitField<0, 14, u64> width;
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BitField<14, 14, u64> height;
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BitField<28, 3, u64> perf_modulation;
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BitField<31, 1, u64> interlaced;
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BitField<32, 3, u64> dst_sel_x;
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BitField<35, 3, u64> dst_sel_y;
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BitField<38, 3, u64> dst_sel_z;
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BitField<41, 3, u64> dst_sel_w;
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BitField<44, 4, u64> base_level;
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BitField<48, 4, u64> last_level;
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BitField<52, 5, u64> tiling_index;
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BitField<57, 1, u64> pow2pad;
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BitField<58, 1, u64> mtype2;
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BitField<59, 1, u64> atc;
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BitField<60, 4, ImageType> type;
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};
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VAddr Address() const {
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return base_address << 8;
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}
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DataFormat GetDataFmt() const noexcept {
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return static_cast<DataFormat>(data_format.Value());
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}
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NumberFormat GetNumberFmt() const noexcept {
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return static_cast<NumberFormat>(num_format.Value());
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}
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};
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// 8.2.7. Image Sampler [RDNA 2 Instruction Set Architecture]
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enum class ClampMode : u64 {
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Wrap = 0,
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Mirror = 1,
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ClampLastTexel = 2,
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MirrorOnceLastTexel = 3,
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ClampHalfBorder = 4,
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MirrorOnceHalfBorder = 5,
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ClampBorder = 6,
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MirrorOnceBorder = 7,
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};
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enum class AnisoRatio : u64 {
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One,
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Two,
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Four,
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Eight,
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Sixteen,
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};
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enum class DepthCompare : u64 {
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Never = 0,
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Less = 1,
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Equal = 2,
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LessEqual = 3,
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Greater = 4,
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NotEqual = 5,
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GreaterEqual = 6,
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Always = 7,
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};
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enum class FilterMode : u64 {
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Blend = 0,
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Min = 1,
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Max = 2,
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};
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enum class Filter : u64 {
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Point = 0,
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Bilinear = 1,
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AnisoPoint = 2,
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AnisoLinear = 3,
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};
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enum class MipFilter : u64 {
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None = 0,
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Point = 1,
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Linear = 2,
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};
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enum class BorderColor : u64 {
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OpaqueBlack = 0,
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TransparentBlack = 1,
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White = 2,
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Custom = 3,
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};
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// Table 8.12 Sampler Resource Definition
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struct Sampler {
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union {
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BitField<0, 3, ClampMode> clamp_x;
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BitField<3, 3, ClampMode> clamp_y;
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BitField<6, 3, ClampMode> clamp_z;
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BitField<9, 3, AnisoRatio> max_aniso;
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BitField<12, 3, DepthCompare> depth_compare_func;
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BitField<15, 1, u64> force_unnormalized;
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BitField<16, 3, u64> aniso_threshold;
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BitField<19, 1, u64> mc_coord_trunc;
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BitField<20, 1, u64> force_degamma;
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BitField<21, 6, u64> aniso_bias;
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BitField<27, 1, u64> trunc_coord;
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BitField<28, 1, u64> disable_cube_wrap;
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BitField<29, 2, FilterMode> filter_mode;
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BitField<32, 12, u64> min_lod;
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BitField<44, 12, u64> max_lod;
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BitField<56, 4, u64> perf_mip;
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BitField<60, 4, u64> perf_z;
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};
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union {
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BitField<0, 14, u64> lod_bias;
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BitField<14, 6, u64> lod_bias_sec;
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BitField<20, 2, Filter> xy_mag_filter;
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BitField<22, 2, Filter> xy_min_filter;
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BitField<24, 2, u64> z_filter;
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BitField<26, 2, MipFilter> mip_filter;
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BitField<28, 1, u64> mip_point_preclamp;
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BitField<29, 1, u64> disable_lsb_ceil;
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BitField<30, 2, u64> unused0;
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BitField<32, 12, u64> border_color_ptr;
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BitField<42, 18, u64> unused1;
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BitField<62, 2, BorderColor> border_color_type;
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};
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float LodBias() const noexcept {
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return static_cast<float>(lod_bias);
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}
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float MinLod() const noexcept {
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return static_cast<float>(min_lod);
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}
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float MaxLod() const noexcept {
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return static_cast<float>(max_lod);
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}
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};
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} // namespace AmdGpu
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template <>
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struct fmt::formatter<AmdGpu::ImageType> {
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constexpr auto parse(format_parse_context& ctx) {
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return ctx.begin();
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}
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auto format(AmdGpu::ImageType type, format_context& ctx) const {
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return fmt::format_to(ctx.out(), "{}", AmdGpu::NameOf(type));
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}
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};
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@ -6,6 +6,8 @@
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namespace Vulkan::LiverpoolToVK {
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using DepthBuffer = Liverpool::DepthBuffer;
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vk::StencilOp StencilOp(Liverpool::StencilFunc op) {
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switch (op) {
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case Liverpool::StencilFunc::Keep:
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@ -77,6 +79,8 @@ vk::PrimitiveTopology PrimitiveType(Liverpool::PrimitiveType type) {
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case Liverpool::PrimitiveType::QuadList:
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// Needs to generate index buffer on the fly.
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return vk::PrimitiveTopology::eTriangleList;
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case Liverpool::PrimitiveType::RectList:
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return vk::PrimitiveTopology::eTriangleList;
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default:
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UNREACHABLE();
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return vk::PrimitiveTopology::eTriangleList;
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@ -113,6 +117,161 @@ vk::CullModeFlags CullMode(Liverpool::CullMode mode) {
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}
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}
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vk::BlendFactor BlendFactor(Liverpool::BlendControl::BlendFactor factor) {
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using BlendFactor = Liverpool::BlendControl::BlendFactor;
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switch (factor) {
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case BlendFactor::Zero:
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return vk::BlendFactor::eZero;
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case BlendFactor::One:
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return vk::BlendFactor::eOne;
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case BlendFactor::SrcColor:
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return vk::BlendFactor::eSrcColor;
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case BlendFactor::OneMinusSrcColor:
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return vk::BlendFactor::eOneMinusSrcColor;
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case BlendFactor::SrcAlpha:
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return vk::BlendFactor::eSrcAlpha;
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case BlendFactor::OneMinusSrcAlpha:
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return vk::BlendFactor::eOneMinusSrcAlpha;
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case BlendFactor::DstAlpha:
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return vk::BlendFactor::eDstAlpha;
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case BlendFactor::OneMinusDstAlpha:
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return vk::BlendFactor::eOneMinusDstAlpha;
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case BlendFactor::DstColor:
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return vk::BlendFactor::eDstColor;
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case BlendFactor::OneMinusDstColor:
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return vk::BlendFactor::eOneMinusDstColor;
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case BlendFactor::SrcAlphaSaturate:
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return vk::BlendFactor::eSrcAlphaSaturate;
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case BlendFactor::ConstantColor:
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return vk::BlendFactor::eConstantColor;
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case BlendFactor::OneMinusConstantColor:
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return vk::BlendFactor::eOneMinusConstantColor;
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case BlendFactor::Src1Color:
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return vk::BlendFactor::eSrc1Color;
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case BlendFactor::InvSrc1Color:
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return vk::BlendFactor::eOneMinusSrc1Color;
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case BlendFactor::Src1Alpha:
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return vk::BlendFactor::eSrc1Alpha;
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case BlendFactor::InvSrc1Alpha:
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return vk::BlendFactor::eOneMinusSrc1Alpha;
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case BlendFactor::ConstantAlpha:
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return vk::BlendFactor::eConstantAlpha;
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case BlendFactor::OneMinusConstantAlpha:
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return vk::BlendFactor::eOneMinusConstantAlpha;
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default:
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UNREACHABLE();
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}
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}
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vk::BlendOp BlendOp(Liverpool::BlendControl::BlendFunc func) {
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using BlendFunc = Liverpool::BlendControl::BlendFunc;
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switch (func) {
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case BlendFunc::Add:
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return vk::BlendOp::eAdd;
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case BlendFunc::Subtract:
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return vk::BlendOp::eSubtract;
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case BlendFunc::Min:
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return vk::BlendOp::eMin;
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case BlendFunc::Max:
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return vk::BlendOp::eMax;
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default:
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UNREACHABLE();
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}
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}
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// https://github.com/chaotic-cx/mesa-mirror/blob/0954afff5/src/amd/vulkan/radv_sampler.c#L21
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vk::SamplerAddressMode ClampMode(AmdGpu::ClampMode mode) {
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switch (mode) {
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case AmdGpu::ClampMode::Wrap:
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return vk::SamplerAddressMode::eRepeat;
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case AmdGpu::ClampMode::Mirror:
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return vk::SamplerAddressMode::eMirroredRepeat;
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case AmdGpu::ClampMode::ClampLastTexel:
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return vk::SamplerAddressMode::eClampToEdge;
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case AmdGpu::ClampMode::MirrorOnceLastTexel:
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return vk::SamplerAddressMode::eMirrorClampToEdge;
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case AmdGpu::ClampMode::ClampBorder:
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return vk::SamplerAddressMode::eClampToBorder;
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default:
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UNREACHABLE();
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}
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}
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vk::CompareOp DepthCompare(AmdGpu::DepthCompare comp) {
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switch (comp) {
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case AmdGpu::DepthCompare::Never:
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return vk::CompareOp::eNever;
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case AmdGpu::DepthCompare::Less:
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return vk::CompareOp::eLess;
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case AmdGpu::DepthCompare::Equal:
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return vk::CompareOp::eEqual;
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case AmdGpu::DepthCompare::LessEqual:
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return vk::CompareOp::eLessOrEqual;
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case AmdGpu::DepthCompare::Greater:
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return vk::CompareOp::eGreater;
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case AmdGpu::DepthCompare::NotEqual:
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return vk::CompareOp::eNotEqual;
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case AmdGpu::DepthCompare::GreaterEqual:
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return vk::CompareOp::eGreaterOrEqual;
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case AmdGpu::DepthCompare::Always:
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return vk::CompareOp::eAlways;
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}
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}
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vk::Filter Filter(AmdGpu::Filter filter) {
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switch (filter) {
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case AmdGpu::Filter::Point:
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case AmdGpu::Filter::AnisoPoint:
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return vk::Filter::eNearest;
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case AmdGpu::Filter::Bilinear:
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case AmdGpu::Filter::AnisoLinear:
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return vk::Filter::eLinear;
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||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
vk::SamplerReductionMode FilterMode(AmdGpu::FilterMode mode) {
|
||||
switch (mode) {
|
||||
case AmdGpu::FilterMode::Blend:
|
||||
return vk::SamplerReductionMode::eWeightedAverage;
|
||||
case AmdGpu::FilterMode::Min:
|
||||
return vk::SamplerReductionMode::eMin;
|
||||
case AmdGpu::FilterMode::Max:
|
||||
return vk::SamplerReductionMode::eMax;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
vk::SamplerMipmapMode MipFilter(AmdGpu::MipFilter filter) {
|
||||
switch (filter) {
|
||||
case AmdGpu::MipFilter::Point:
|
||||
return vk::SamplerMipmapMode::eNearest;
|
||||
case AmdGpu::MipFilter::Linear:
|
||||
return vk::SamplerMipmapMode::eLinear;
|
||||
case AmdGpu::MipFilter::None:
|
||||
return vk::SamplerMipmapMode::eNearest;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
vk::BorderColor BorderColor(AmdGpu::BorderColor color) {
|
||||
switch (color) {
|
||||
case AmdGpu::BorderColor::OpaqueBlack:
|
||||
return vk::BorderColor::eFloatOpaqueBlack;
|
||||
case AmdGpu::BorderColor::TransparentBlack:
|
||||
return vk::BorderColor::eFloatTransparentBlack;
|
||||
case AmdGpu::BorderColor::White:
|
||||
return vk::BorderColor::eFloatOpaqueWhite;
|
||||
case AmdGpu::BorderColor::Custom:
|
||||
return vk::BorderColor::eFloatCustomEXT;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat num_format) {
|
||||
if (data_format == AmdGpu::DataFormat::Format32_32_32_32 &&
|
||||
num_format == AmdGpu::NumberFormat::Float) {
|
||||
|
|
@ -130,11 +289,22 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
|
|||
num_format == AmdGpu::NumberFormat::Srgb) {
|
||||
return vk::Format::eR8G8B8A8Srgb;
|
||||
}
|
||||
if (data_format == AmdGpu::DataFormat::Format32_32_32 &&
|
||||
num_format == AmdGpu::NumberFormat::Float) {
|
||||
return vk::Format::eR32G32B32Sfloat;
|
||||
}
|
||||
if (data_format == AmdGpu::DataFormat::Format32_32 &&
|
||||
num_format == AmdGpu::NumberFormat::Float) {
|
||||
return vk::Format::eR32G32Sfloat;
|
||||
}
|
||||
UNREACHABLE();
|
||||
}
|
||||
|
||||
vk::Format DepthFormat(Liverpool::DepthBuffer::ZFormat z_format,
|
||||
Liverpool::DepthBuffer::StencilFormat stencil_format) {
|
||||
vk::Format DepthFormat(DepthBuffer::ZFormat z_format, DepthBuffer::StencilFormat stencil_format) {
|
||||
if (z_format == DepthBuffer::ZFormat::Z32Float &&
|
||||
stencil_format == DepthBuffer::StencilFormat::Stencil8) {
|
||||
return vk::Format::eD32SfloatS8Uint;
|
||||
}
|
||||
UNREACHABLE();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -5,6 +5,7 @@
|
|||
|
||||
#include "video_core/amdgpu/liverpool.h"
|
||||
#include "video_core/amdgpu/pixel_format.h"
|
||||
#include "video_core/amdgpu/resource.h"
|
||||
#include "video_core/renderer_vulkan/vk_common.h"
|
||||
|
||||
namespace Vulkan::LiverpoolToVK {
|
||||
|
|
@ -21,6 +22,22 @@ vk::PolygonMode PolygonMode(Liverpool::PolygonMode mode);
|
|||
|
||||
vk::CullModeFlags CullMode(Liverpool::CullMode mode);
|
||||
|
||||
vk::BlendFactor BlendFactor(Liverpool::BlendControl::BlendFactor factor);
|
||||
|
||||
vk::BlendOp BlendOp(Liverpool::BlendControl::BlendFunc func);
|
||||
|
||||
vk::SamplerAddressMode ClampMode(AmdGpu::ClampMode mode);
|
||||
|
||||
vk::CompareOp DepthCompare(AmdGpu::DepthCompare comp);
|
||||
|
||||
vk::Filter Filter(AmdGpu::Filter filter);
|
||||
|
||||
vk::SamplerReductionMode FilterMode(AmdGpu::FilterMode mode);
|
||||
|
||||
vk::SamplerMipmapMode MipFilter(AmdGpu::MipFilter filter);
|
||||
|
||||
vk::BorderColor BorderColor(AmdGpu::BorderColor color);
|
||||
|
||||
vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat num_format);
|
||||
|
||||
vk::Format DepthFormat(Liverpool::DepthBuffer::ZFormat z_format,
|
||||
|
|
|
|||
|
|
@ -10,6 +10,8 @@
|
|||
#include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
|
||||
#include "video_core/renderer_vulkan/vk_instance.h"
|
||||
#include "video_core/renderer_vulkan/vk_scheduler.h"
|
||||
#include "video_core/renderer_vulkan/vk_stream_buffer.h"
|
||||
#include "video_core/texture_cache/texture_cache.h"
|
||||
|
||||
namespace Vulkan {
|
||||
|
||||
|
|
@ -25,8 +27,7 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
|
|||
}
|
||||
stages[i] = *infos[i];
|
||||
}
|
||||
|
||||
desc_layout = BuildSetLayout();
|
||||
BuildDescSetLayout();
|
||||
const vk::DescriptorSetLayout set_layout = *desc_layout;
|
||||
const vk::PipelineLayoutCreateInfo layout_info = {
|
||||
.setLayoutCount = 1U,
|
||||
|
|
@ -81,20 +82,6 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
|
|||
.sampleShadingEnable = false,
|
||||
};
|
||||
|
||||
const vk::PipelineColorBlendAttachmentState colorblend_attachment = {
|
||||
.blendEnable = false,
|
||||
.colorWriteMask = vk::ColorComponentFlagBits::eR | vk::ColorComponentFlagBits::eG |
|
||||
vk::ColorComponentFlagBits::eB | vk::ColorComponentFlagBits::eA,
|
||||
};
|
||||
|
||||
const vk::PipelineColorBlendStateCreateInfo color_blending = {
|
||||
.logicOpEnable = false,
|
||||
.logicOp = vk::LogicOp::eCopy,
|
||||
.attachmentCount = 1,
|
||||
.pAttachments = &colorblend_attachment,
|
||||
.blendConstants = std::array{1.0f, 1.0f, 1.0f, 1.0f},
|
||||
};
|
||||
|
||||
const vk::Viewport viewport = {
|
||||
.x = 0.0f,
|
||||
.y = 0.0f,
|
||||
|
|
@ -119,6 +106,7 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
|
|||
boost::container::static_vector<vk::DynamicState, 14> dynamic_states = {
|
||||
vk::DynamicState::eViewport,
|
||||
vk::DynamicState::eScissor,
|
||||
vk::DynamicState::eBlendConstants,
|
||||
};
|
||||
|
||||
const vk::PipelineDynamicStateCreateInfo dynamic_info = {
|
||||
|
|
@ -174,6 +162,30 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
|
|||
.stencilAttachmentFormat = vk::Format::eUndefined,
|
||||
};
|
||||
|
||||
std::array<vk::PipelineColorBlendAttachmentState, Liverpool::NumColorBuffers> attachments;
|
||||
for (u32 i = 0; i < num_color_formats; i++) {
|
||||
const auto& control = key.blend_controls[i];
|
||||
attachments[i] = vk::PipelineColorBlendAttachmentState{
|
||||
.blendEnable = key.blend_controls[i].enable,
|
||||
.srcColorBlendFactor = LiverpoolToVK::BlendFactor(control.color_src_factor),
|
||||
.dstColorBlendFactor = LiverpoolToVK::BlendFactor(control.color_dst_factor),
|
||||
.colorBlendOp = LiverpoolToVK::BlendOp(control.color_func),
|
||||
.srcAlphaBlendFactor = LiverpoolToVK::BlendFactor(control.alpha_src_factor),
|
||||
.dstAlphaBlendFactor = LiverpoolToVK::BlendFactor(control.color_dst_factor),
|
||||
.alphaBlendOp = LiverpoolToVK::BlendOp(control.alpha_func),
|
||||
.colorWriteMask = vk::ColorComponentFlagBits::eR | vk::ColorComponentFlagBits::eG |
|
||||
vk::ColorComponentFlagBits::eB | vk::ColorComponentFlagBits::eA,
|
||||
};
|
||||
}
|
||||
|
||||
const vk::PipelineColorBlendStateCreateInfo color_blending = {
|
||||
.logicOpEnable = false,
|
||||
.logicOp = vk::LogicOp::eCopy,
|
||||
.attachmentCount = num_color_formats,
|
||||
.pAttachments = attachments.data(),
|
||||
.blendConstants = std::array{1.0f, 1.0f, 1.0f, 1.0f},
|
||||
};
|
||||
|
||||
const vk::GraphicsPipelineCreateInfo pipeline_info = {
|
||||
.pNext = &pipeline_rendering_ci,
|
||||
.stageCount = shader_count,
|
||||
|
|
@ -199,14 +211,31 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
|
|||
|
||||
GraphicsPipeline::~GraphicsPipeline() = default;
|
||||
|
||||
vk::UniqueDescriptorSetLayout GraphicsPipeline::BuildSetLayout() const {
|
||||
void GraphicsPipeline::BuildDescSetLayout() {
|
||||
u32 binding{};
|
||||
boost::container::small_vector<vk::DescriptorSetLayoutBinding, 32> bindings;
|
||||
for (const auto& stage : stages) {
|
||||
for (const auto& buffer : stage.buffers) {
|
||||
bindings.push_back({
|
||||
.binding = binding++,
|
||||
.descriptorType = vk::DescriptorType::eStorageBuffer,
|
||||
.descriptorType = buffer.is_storage ? vk::DescriptorType::eStorageBuffer
|
||||
: vk::DescriptorType::eUniformBuffer,
|
||||
.descriptorCount = 1,
|
||||
.stageFlags = vk::ShaderStageFlagBits::eVertex | vk::ShaderStageFlagBits::eFragment,
|
||||
});
|
||||
}
|
||||
for (const auto& image : stage.images) {
|
||||
bindings.push_back({
|
||||
.binding = binding++,
|
||||
.descriptorType = vk::DescriptorType::eSampledImage,
|
||||
.descriptorCount = 1,
|
||||
.stageFlags = vk::ShaderStageFlagBits::eVertex | vk::ShaderStageFlagBits::eFragment,
|
||||
});
|
||||
}
|
||||
for (const auto& sampler : stage.samplers) {
|
||||
bindings.push_back({
|
||||
.binding = binding++,
|
||||
.descriptorType = vk::DescriptorType::eSampler,
|
||||
.descriptorCount = 1,
|
||||
.stageFlags = vk::ShaderStageFlagBits::eVertex | vk::ShaderStageFlagBits::eFragment,
|
||||
});
|
||||
|
|
@ -217,12 +246,24 @@ vk::UniqueDescriptorSetLayout GraphicsPipeline::BuildSetLayout() const {
|
|||
.bindingCount = static_cast<u32>(bindings.size()),
|
||||
.pBindings = bindings.data(),
|
||||
};
|
||||
return instance.GetDevice().createDescriptorSetLayoutUnique(desc_layout_ci);
|
||||
desc_layout = instance.GetDevice().createDescriptorSetLayoutUnique(desc_layout_ci);
|
||||
}
|
||||
|
||||
void GraphicsPipeline::BindResources(Core::MemoryManager* memory) const {
|
||||
void GraphicsPipeline::BindResources(Core::MemoryManager* memory, StreamBuffer& staging,
|
||||
VideoCore::TextureCache& texture_cache) const {
|
||||
static constexpr u64 MinUniformAlignment = 64;
|
||||
|
||||
const auto map_staging = [&](auto src, size_t size) {
|
||||
const auto [data, offset, _] = staging.Map(size, MinUniformAlignment);
|
||||
std::memcpy(data, reinterpret_cast<const void*>(src), size);
|
||||
staging.Commit(size);
|
||||
return offset;
|
||||
};
|
||||
|
||||
std::array<vk::Buffer, MaxVertexBufferCount> buffers;
|
||||
std::array<vk::DeviceSize, MaxVertexBufferCount> offsets;
|
||||
VAddr base_address = 0;
|
||||
u32 start_offset = 0;
|
||||
|
||||
// Bind vertex buffer.
|
||||
const auto& vs_info = stages[0];
|
||||
|
|
@ -230,38 +271,77 @@ void GraphicsPipeline::BindResources(Core::MemoryManager* memory) const {
|
|||
for (u32 i = 0; i < num_buffers; ++i) {
|
||||
const auto& input = vs_info.vs_inputs[i];
|
||||
const auto buffer = vs_info.ReadUd<AmdGpu::Buffer>(input.sgpr_base, input.dword_offset);
|
||||
std::tie(buffers[i], offsets[i]) = memory->GetVulkanBuffer(buffer.base_address);
|
||||
if (i == 0) {
|
||||
start_offset =
|
||||
map_staging(buffer.base_address.Value(), buffer.stride * buffer.num_records);
|
||||
base_address = buffer.base_address;
|
||||
}
|
||||
buffers[i] = staging.Handle();
|
||||
offsets[i] = start_offset + buffer.base_address - base_address;
|
||||
}
|
||||
|
||||
const auto cmdbuf = scheduler.CommandBuffer();
|
||||
cmdbuf.bindVertexBuffers(0, num_buffers, buffers.data(), offsets.data());
|
||||
if (num_buffers > 0) {
|
||||
cmdbuf.bindVertexBuffers(0, num_buffers, buffers.data(), offsets.data());
|
||||
}
|
||||
|
||||
// Bind resource buffers and textures.
|
||||
boost::container::static_vector<vk::DescriptorBufferInfo, 4> buffer_infos;
|
||||
boost::container::static_vector<vk::DescriptorImageInfo, 8> image_infos;
|
||||
boost::container::small_vector<vk::WriteDescriptorSet, 16> set_writes;
|
||||
u32 binding{};
|
||||
|
||||
for (const auto& stage : stages) {
|
||||
for (const auto& buffer : stage.buffers) {
|
||||
const auto vsharp = stage.ReadUd<AmdGpu::Buffer>(buffer.sgpr_base, buffer.dword_offset);
|
||||
const auto [vk_buffer, offset] = memory->GetVulkanBuffer(vsharp.base_address);
|
||||
buffer_infos.push_back({
|
||||
.buffer = vk_buffer,
|
||||
.offset = offset,
|
||||
.range = vsharp.stride * vsharp.num_records,
|
||||
});
|
||||
const u32 size = vsharp.stride * vsharp.num_records;
|
||||
const u32 offset = map_staging(vsharp.base_address.Value(), size);
|
||||
buffer_infos.emplace_back(staging.Handle(), offset, size);
|
||||
set_writes.push_back({
|
||||
.dstSet = VK_NULL_HANDLE,
|
||||
.dstBinding = binding,
|
||||
.dstBinding = binding++,
|
||||
.dstArrayElement = 0,
|
||||
.descriptorCount = 1,
|
||||
.descriptorType = vk::DescriptorType::eStorageBuffer,
|
||||
.descriptorType = buffer.is_storage ? vk::DescriptorType::eStorageBuffer
|
||||
: vk::DescriptorType::eUniformBuffer,
|
||||
.pBufferInfo = &buffer_infos.back(),
|
||||
});
|
||||
}
|
||||
|
||||
for (const auto& image : stage.images) {
|
||||
const auto tsharp = stage.ReadUd<AmdGpu::Image>(image.sgpr_base, image.dword_offset);
|
||||
const auto& image_view = texture_cache.FindImageView(tsharp);
|
||||
image_infos.emplace_back(VK_NULL_HANDLE, *image_view.image_view,
|
||||
vk::ImageLayout::eGeneral);
|
||||
set_writes.push_back({
|
||||
.dstSet = VK_NULL_HANDLE,
|
||||
.dstBinding = binding++,
|
||||
.dstArrayElement = 0,
|
||||
.descriptorCount = 1,
|
||||
.descriptorType = vk::DescriptorType::eSampledImage,
|
||||
.pImageInfo = &image_infos.back(),
|
||||
});
|
||||
}
|
||||
for (const auto& sampler : stage.samplers) {
|
||||
const auto ssharp =
|
||||
stage.ReadUd<AmdGpu::Sampler>(sampler.sgpr_base, sampler.dword_offset);
|
||||
const auto vk_sampler = texture_cache.GetSampler(ssharp);
|
||||
image_infos.emplace_back(vk_sampler, VK_NULL_HANDLE, vk::ImageLayout::eGeneral);
|
||||
set_writes.push_back({
|
||||
.dstSet = VK_NULL_HANDLE,
|
||||
.dstBinding = binding++,
|
||||
.dstArrayElement = 0,
|
||||
.descriptorCount = 1,
|
||||
.descriptorType = vk::DescriptorType::eSampler,
|
||||
.pImageInfo = &image_infos.back(),
|
||||
});
|
||||
}
|
||||
}
|
||||
|
||||
cmdbuf.pushDescriptorSetKHR(vk::PipelineBindPoint::eGraphics, *pipeline_layout, 0, set_writes);
|
||||
if (!set_writes.empty()) {
|
||||
cmdbuf.pushDescriptorSetKHR(vk::PipelineBindPoint::eGraphics, *pipeline_layout, 0,
|
||||
set_writes);
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace Vulkan
|
||||
|
|
|
|||
|
|
@ -11,6 +11,10 @@ namespace Core {
|
|||
class MemoryManager;
|
||||
}
|
||||
|
||||
namespace VideoCore {
|
||||
class TextureCache;
|
||||
}
|
||||
|
||||
namespace Vulkan {
|
||||
|
||||
static constexpr u32 MaxVertexBufferCount = 32;
|
||||
|
|
@ -18,6 +22,7 @@ static constexpr u32 MaxShaderStages = 5;
|
|||
|
||||
class Instance;
|
||||
class Scheduler;
|
||||
class StreamBuffer;
|
||||
|
||||
using Liverpool = AmdGpu::Liverpool;
|
||||
|
||||
|
|
@ -33,6 +38,7 @@ struct PipelineKey {
|
|||
Liverpool::PrimitiveType prim_type;
|
||||
Liverpool::PolygonMode polygon_mode;
|
||||
Liverpool::CullMode cull_mode;
|
||||
std::array<Liverpool::BlendControl, Liverpool::NumColorBuffers> blend_controls;
|
||||
|
||||
bool operator==(const PipelineKey& key) const noexcept {
|
||||
return std::memcmp(this, &key, sizeof(PipelineKey)) == 0;
|
||||
|
|
@ -48,14 +54,15 @@ public:
|
|||
std::array<vk::ShaderModule, MaxShaderStages> modules);
|
||||
~GraphicsPipeline();
|
||||
|
||||
void BindResources(Core::MemoryManager* memory) const;
|
||||
void BindResources(Core::MemoryManager* memory, StreamBuffer& staging,
|
||||
VideoCore::TextureCache& texture_cache) const;
|
||||
|
||||
[[nodiscard]] vk::Pipeline Handle() const noexcept {
|
||||
return *pipeline;
|
||||
}
|
||||
|
||||
private:
|
||||
vk::UniqueDescriptorSetLayout BuildSetLayout() const;
|
||||
void BuildDescSetLayout();
|
||||
|
||||
private:
|
||||
const Instance& instance;
|
||||
|
|
|
|||
|
|
@ -151,6 +151,7 @@ bool Instance::CreateDevice() {
|
|||
custom_border_color = add_extension(VK_EXT_CUSTOM_BORDER_COLOR_EXTENSION_NAME);
|
||||
index_type_uint8 = add_extension(VK_KHR_INDEX_TYPE_UINT8_EXTENSION_NAME);
|
||||
add_extension(VK_KHR_PUSH_DESCRIPTOR_EXTENSION_NAME);
|
||||
add_extension(VK_KHR_MAINTENANCE_4_EXTENSION_NAME);
|
||||
|
||||
const auto family_properties = physical_device.getQueueFamilyProperties();
|
||||
if (family_properties.empty()) {
|
||||
|
|
@ -213,6 +214,9 @@ bool Instance::CreateDevice() {
|
|||
vk::PhysicalDeviceIndexTypeUint8FeaturesEXT{
|
||||
.indexTypeUint8 = true,
|
||||
},
|
||||
vk::PhysicalDeviceMaintenance4Features{
|
||||
.maintenance4 = true,
|
||||
},
|
||||
};
|
||||
|
||||
if (!index_type_uint8) {
|
||||
|
|
|
|||
|
|
@ -1,11 +1,13 @@
|
|||
// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <fstream>
|
||||
#include <xxhash.h>
|
||||
#include "common/config.h"
|
||||
#include "common/io_file.h"
|
||||
#include "common/path_util.h"
|
||||
#include "shader_recompiler/backend/spirv/emit_spirv.h"
|
||||
#include "shader_recompiler/recompiler.h"
|
||||
#include "shader_recompiler/runtime_info.h"
|
||||
#include "video_core/amdgpu/resource.h"
|
||||
#include "video_core/renderer_vulkan/vk_instance.h"
|
||||
#include "video_core/renderer_vulkan/vk_pipeline_cache.h"
|
||||
#include "video_core/renderer_vulkan/vk_scheduler.h"
|
||||
|
|
@ -41,6 +43,9 @@ PipelineCache::PipelineCache(const Instance& instance_, Scheduler& scheduler_,
|
|||
: instance{instance_}, scheduler{scheduler_}, liverpool{liverpool_}, inst_pool{8192},
|
||||
block_pool{512} {
|
||||
pipeline_cache = instance.GetDevice().createPipelineCacheUnique({});
|
||||
profile = Shader::Profile{
|
||||
.supported_spirv = 0x00010600U,
|
||||
};
|
||||
}
|
||||
|
||||
const GraphicsPipeline* PipelineCache::GetPipeline() {
|
||||
|
|
@ -63,6 +68,7 @@ void PipelineCache::RefreshKey() {
|
|||
key.stencil_ref_back = regs.stencil_ref_back;
|
||||
key.prim_type = regs.primitive_type;
|
||||
key.polygon_mode = regs.polygon_control.PolyMode();
|
||||
key.blend_controls = regs.blend_control;
|
||||
|
||||
const auto& db = regs.depth_buffer;
|
||||
key.depth_format = key.depth.depth_enable
|
||||
|
|
@ -81,17 +87,15 @@ void PipelineCache::RefreshKey() {
|
|||
key.stage_hashes[i] = 0;
|
||||
continue;
|
||||
}
|
||||
const u32* code = pgm->Address<u32>();
|
||||
|
||||
Shader::BinaryInfo bininfo;
|
||||
std::memcpy(&bininfo, code + (code[1] + 1) * 2, sizeof(bininfo));
|
||||
key.stage_hashes[i] = bininfo.shader_hash;
|
||||
const auto code = pgm->Code();
|
||||
key.stage_hashes[i] = XXH3_64bits(code.data(), code.size_bytes());
|
||||
}
|
||||
}
|
||||
|
||||
std::unique_ptr<GraphicsPipeline> PipelineCache::CreatePipeline() {
|
||||
const auto& regs = liverpool->regs;
|
||||
|
||||
u32 binding{};
|
||||
std::array<Shader::IR::Program, MaxShaderStages> programs;
|
||||
std::array<const Shader::Info*, MaxShaderStages> infos{};
|
||||
|
||||
|
|
@ -101,40 +105,49 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreatePipeline() {
|
|||
continue;
|
||||
}
|
||||
auto* pgm = regs.ProgramForStage(i);
|
||||
const u32* code = pgm->Address<u32>();
|
||||
const auto code = pgm->Code();
|
||||
|
||||
Shader::BinaryInfo bininfo;
|
||||
std::memcpy(&bininfo, code + (code[1] + 1) * 2, sizeof(bininfo));
|
||||
const u32 num_dwords = bininfo.length / sizeof(u32);
|
||||
|
||||
const auto it = module_map.find(bininfo.shader_hash);
|
||||
const auto it = module_map.find(graphics_key.stage_hashes[i]);
|
||||
if (it != module_map.end()) {
|
||||
stages[i] = *it->second;
|
||||
continue;
|
||||
}
|
||||
|
||||
// Dump shader code if requested.
|
||||
const auto stage = Shader::Stage{i};
|
||||
const u64 hash = graphics_key.stage_hashes[i];
|
||||
if (Config::dumpShaders()) {
|
||||
DumpShader(code, hash, stage, "bin");
|
||||
}
|
||||
|
||||
block_pool.ReleaseContents();
|
||||
inst_pool.ReleaseContents();
|
||||
|
||||
// Recompile shader to IR.
|
||||
const auto stage = Shader::Stage{i};
|
||||
const Shader::Info info = MakeShaderInfo(stage, pgm->user_data, regs);
|
||||
programs[i] = Shader::TranslateProgram(inst_pool, block_pool, std::span{code, num_dwords},
|
||||
std::move(info));
|
||||
programs[i] = Shader::TranslateProgram(inst_pool, block_pool, code, std::move(info));
|
||||
|
||||
// Compile IR to SPIR-V
|
||||
const auto profile = Shader::Profile{.supported_spirv = 0x00010600U};
|
||||
const auto spv_code = Shader::Backend::SPIRV::EmitSPIRV(profile, programs[i]);
|
||||
std::ofstream file("shader0.spv", std::ios::out | std::ios::binary);
|
||||
file.write((const char*)spv_code.data(), spv_code.size() * 4);
|
||||
file.close();
|
||||
|
||||
const auto spv_code = Shader::Backend::SPIRV::EmitSPIRV(profile, programs[i], binding);
|
||||
stages[i] = CompileSPV(spv_code, instance.GetDevice());
|
||||
infos[i] = &programs[i].info;
|
||||
|
||||
if (Config::dumpShaders()) {
|
||||
DumpShader(spv_code, hash, stage, "spv");
|
||||
}
|
||||
}
|
||||
|
||||
return std::make_unique<GraphicsPipeline>(instance, scheduler, graphics_key, *pipeline_cache,
|
||||
infos, stages);
|
||||
}
|
||||
|
||||
void PipelineCache::DumpShader(std::span<const u32> code, u64 hash, Shader::Stage stage,
|
||||
std::string_view ext) {
|
||||
using namespace Common::FS;
|
||||
const auto dump_dir = GetUserPath(PathType::ShaderDir) / "dumps";
|
||||
const auto filename = fmt::format("{}_{:#X}.{}", stage, hash, ext);
|
||||
const auto file = IOFile{dump_dir / filename, FileAccessMode::Write};
|
||||
file.WriteSpan(code);
|
||||
}
|
||||
|
||||
} // namespace Vulkan
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
#include <tsl/robin_map.h>
|
||||
#include "shader_recompiler/ir/basic_block.h"
|
||||
#include "shader_recompiler/object_pool.h"
|
||||
#include "shader_recompiler/profile.h"
|
||||
#include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
|
||||
|
||||
namespace Shader {
|
||||
|
|
@ -32,6 +33,8 @@ private:
|
|||
|
||||
std::unique_ptr<GraphicsPipeline> CreatePipeline();
|
||||
|
||||
void DumpShader(std::span<const u32> code, u64 hash, Shader::Stage stage, std::string_view ext);
|
||||
|
||||
private:
|
||||
const Instance& instance;
|
||||
Scheduler& scheduler;
|
||||
|
|
@ -41,6 +44,7 @@ private:
|
|||
tsl::robin_map<size_t, vk::UniqueShaderModule> module_map;
|
||||
std::array<vk::ShaderModule, MaxShaderStages> stages{};
|
||||
tsl::robin_map<PipelineKey, std::unique_ptr<GraphicsPipeline>> graphics_pipelines;
|
||||
Shader::Profile profile{};
|
||||
PipelineKey graphics_key{};
|
||||
Shader::ObjectPool<Shader::IR::Inst> inst_pool;
|
||||
Shader::ObjectPool<Shader::IR::Block> block_pool;
|
||||
|
|
|
|||
|
|
@ -12,16 +12,17 @@
|
|||
|
||||
namespace Vulkan {
|
||||
|
||||
static constexpr vk::BufferUsageFlags VertexIndexFlags = vk::BufferUsageFlagBits::eVertexBuffer |
|
||||
vk::BufferUsageFlagBits::eIndexBuffer |
|
||||
vk::BufferUsageFlagBits::eTransferDst;
|
||||
static constexpr vk::BufferUsageFlags VertexIndexFlags =
|
||||
vk::BufferUsageFlagBits::eVertexBuffer | vk::BufferUsageFlagBits::eIndexBuffer |
|
||||
vk::BufferUsageFlagBits::eTransferDst | vk::BufferUsageFlagBits::eUniformBuffer |
|
||||
vk::BufferUsageFlagBits::eStorageBuffer;
|
||||
|
||||
Rasterizer::Rasterizer(const Instance& instance_, Scheduler& scheduler_,
|
||||
VideoCore::TextureCache& texture_cache_, AmdGpu::Liverpool* liverpool_)
|
||||
: instance{instance_}, scheduler{scheduler_}, texture_cache{texture_cache_},
|
||||
liverpool{liverpool_}, memory{Core::Memory::Instance()},
|
||||
pipeline_cache{instance, scheduler, liverpool},
|
||||
vertex_index_buffer{instance, scheduler, VertexIndexFlags, 64_MB} {
|
||||
vertex_index_buffer{instance, scheduler, VertexIndexFlags, 128_MB} {
|
||||
if (!Config::nullGpu()) {
|
||||
liverpool->BindRasterizer(this);
|
||||
}
|
||||
|
|
@ -35,9 +36,10 @@ void Rasterizer::Draw(bool is_indexed) {
|
|||
const auto cmdbuf = scheduler.CommandBuffer();
|
||||
const auto& regs = liverpool->regs;
|
||||
const u32 num_indices = SetupIndexBuffer(is_indexed);
|
||||
const auto& image_view = texture_cache.RenderTarget(regs.color_buffers[0]);
|
||||
const GraphicsPipeline* pipeline = pipeline_cache.GetPipeline();
|
||||
pipeline->BindResources(memory);
|
||||
pipeline->BindResources(memory, vertex_index_buffer, texture_cache);
|
||||
|
||||
const auto& image_view = texture_cache.RenderTarget(regs.color_buffers[0]);
|
||||
|
||||
const vk::RenderingAttachmentInfo color_info = {
|
||||
.imageView = *image_view.image_view,
|
||||
|
|
@ -88,18 +90,30 @@ u32 Rasterizer::SetupIndexBuffer(bool& is_indexed) {
|
|||
return regs.num_indices;
|
||||
}
|
||||
|
||||
const VAddr index_address = regs.index_base_address.Address();
|
||||
const auto [buffer, offset] = memory->GetVulkanBuffer(index_address);
|
||||
const vk::IndexType index_type =
|
||||
regs.index_buffer_type.index_type == Liverpool::IndexType::Index16 ? vk::IndexType::eUint16
|
||||
: vk::IndexType::eUint32;
|
||||
// Figure out index type and size.
|
||||
const bool is_index16 = regs.index_buffer_type.index_type == Liverpool::IndexType::Index16;
|
||||
const vk::IndexType index_type = is_index16 ? vk::IndexType::eUint16 : vk::IndexType::eUint32;
|
||||
const u32 index_size = is_index16 ? sizeof(u16) : sizeof(u32);
|
||||
|
||||
// Upload index data to stream buffer.
|
||||
const auto index_address = regs.index_base_address.Address<const void*>();
|
||||
const u32 index_buffer_size = regs.num_indices * 4;
|
||||
const auto [data, offset, _] = vertex_index_buffer.Map(index_buffer_size);
|
||||
std::memcpy(data, index_address, index_buffer_size);
|
||||
vertex_index_buffer.Commit(index_buffer_size);
|
||||
|
||||
// Bind index buffer.
|
||||
const auto cmdbuf = scheduler.CommandBuffer();
|
||||
cmdbuf.bindIndexBuffer(buffer, offset, index_type);
|
||||
cmdbuf.bindIndexBuffer(vertex_index_buffer.Handle(), offset, index_type);
|
||||
return regs.num_indices;
|
||||
}
|
||||
|
||||
void Rasterizer::UpdateDynamicState() {
|
||||
UpdateViewportScissorState();
|
||||
|
||||
auto& regs = liverpool->regs;
|
||||
const auto cmdbuf = scheduler.CommandBuffer();
|
||||
cmdbuf.setBlendConstants(®s.blend_constants.red);
|
||||
}
|
||||
|
||||
void Rasterizer::UpdateViewportScissorState() {
|
||||
|
|
|
|||
|
|
@ -44,6 +44,22 @@ using Libraries::VideoOut::TilingMode;
|
|||
return usage;
|
||||
}
|
||||
|
||||
[[nodiscard]] vk::ImageType ConvertImageType(AmdGpu::ImageType type) noexcept {
|
||||
switch (type) {
|
||||
case AmdGpu::ImageType::Color1D:
|
||||
return vk::ImageType::e1D;
|
||||
case AmdGpu::ImageType::Color2D:
|
||||
case AmdGpu::ImageType::Color1DArray:
|
||||
case AmdGpu::ImageType::Cube:
|
||||
return vk::ImageType::e2D;
|
||||
case AmdGpu::ImageType::Color3D:
|
||||
case AmdGpu::ImageType::Color2DArray:
|
||||
return vk::ImageType::e3D;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
ImageInfo::ImageInfo(const Libraries::VideoOut::BufferAttributeGroup& group) noexcept {
|
||||
const auto& attrib = group.attrib;
|
||||
is_tiled = attrib.tiling_mode == TilingMode::Tile;
|
||||
|
|
@ -72,10 +88,23 @@ ImageInfo::ImageInfo(const AmdGpu::Liverpool::ColorBuffer& buffer) noexcept {
|
|||
type = vk::ImageType::e2D;
|
||||
size.width = buffer.Pitch();
|
||||
size.height = buffer.Height();
|
||||
size.depth = 1;
|
||||
pitch = size.width;
|
||||
guest_size_bytes = buffer.slice.tile_max * (buffer.view.slice_max + 1);
|
||||
}
|
||||
|
||||
ImageInfo::ImageInfo(const AmdGpu::Image& image) noexcept {
|
||||
is_tiled = false;
|
||||
pixel_format = LiverpoolToVK::SurfaceFormat(image.GetDataFmt(), image.GetNumberFmt());
|
||||
type = ConvertImageType(image.type);
|
||||
size.width = image.width + 1;
|
||||
size.height = image.height + 1;
|
||||
size.depth = 1;
|
||||
// TODO: Derive this properly from tiling params
|
||||
pitch = size.width;
|
||||
guest_size_bytes = size.width * size.height * 4;
|
||||
}
|
||||
|
||||
UniqueImage::UniqueImage(vk::Device device_, VmaAllocator allocator_)
|
||||
: device{device_}, allocator{allocator_} {}
|
||||
|
||||
|
|
@ -109,7 +138,7 @@ Image::Image(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_,
|
|||
: instance{&instance_}, scheduler{&scheduler_}, info{info_},
|
||||
image{instance->GetDevice(), instance->GetAllocator()}, cpu_addr{cpu_addr},
|
||||
cpu_addr_end{cpu_addr + info.guest_size_bytes} {
|
||||
vk::ImageCreateFlags flags{};
|
||||
vk::ImageCreateFlags flags{vk::ImageCreateFlagBits::eMutableFormat};
|
||||
if (info.type == vk::ImageType::e2D && info.resources.layers >= 6 &&
|
||||
info.size.width == info.size.height) {
|
||||
flags |= vk::ImageCreateFlagBits::eCubeCompatible;
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
#include "common/types.h"
|
||||
#include "core/libraries/videoout/buffer.h"
|
||||
#include "video_core/amdgpu/liverpool.h"
|
||||
#include "video_core/amdgpu/resource.h"
|
||||
#include "video_core/renderer_vulkan/vk_common.h"
|
||||
#include "video_core/texture_cache/image_view.h"
|
||||
#include "video_core/texture_cache/types.h"
|
||||
|
|
@ -34,6 +35,7 @@ struct ImageInfo {
|
|||
ImageInfo() = default;
|
||||
explicit ImageInfo(const Libraries::VideoOut::BufferAttributeGroup& group) noexcept;
|
||||
explicit ImageInfo(const AmdGpu::Liverpool::ColorBuffer& buffer) noexcept;
|
||||
explicit ImageInfo(const AmdGpu::Image& image) noexcept;
|
||||
|
||||
bool is_tiled = false;
|
||||
vk::Format pixel_format = vk::Format::eUndefined;
|
||||
|
|
|
|||
|
|
@ -1,11 +1,62 @@
|
|||
// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "video_core/renderer_vulkan/liverpool_to_vk.h"
|
||||
#include "video_core/renderer_vulkan/vk_instance.h"
|
||||
#include "video_core/texture_cache/image_view.h"
|
||||
|
||||
namespace VideoCore {
|
||||
|
||||
vk::ImageViewType ConvertImageViewType(AmdGpu::ImageType type) {
|
||||
switch (type) {
|
||||
case AmdGpu::ImageType::Color1D:
|
||||
return vk::ImageViewType::e1D;
|
||||
case AmdGpu::ImageType::Color1DArray:
|
||||
return vk::ImageViewType::e1DArray;
|
||||
case AmdGpu::ImageType::Color2D:
|
||||
case AmdGpu::ImageType::Cube:
|
||||
return vk::ImageViewType::e2D;
|
||||
case AmdGpu::ImageType::Color2DArray:
|
||||
return vk::ImageViewType::e2DArray;
|
||||
case AmdGpu::ImageType::Color3D:
|
||||
return vk::ImageViewType::e3D;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
vk::ComponentSwizzle ConvertComponentSwizzle(u32 dst_sel) {
|
||||
switch (dst_sel) {
|
||||
case 0:
|
||||
return vk::ComponentSwizzle::eZero;
|
||||
case 1:
|
||||
return vk::ComponentSwizzle::eOne;
|
||||
case 4:
|
||||
return vk::ComponentSwizzle::eR;
|
||||
case 5:
|
||||
return vk::ComponentSwizzle::eG;
|
||||
case 6:
|
||||
return vk::ComponentSwizzle::eB;
|
||||
case 7:
|
||||
return vk::ComponentSwizzle::eA;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
ImageViewInfo::ImageViewInfo(const AmdGpu::Image& image) noexcept {
|
||||
type = ConvertImageViewType(image.type);
|
||||
format = Vulkan::LiverpoolToVK::SurfaceFormat(image.GetDataFmt(), image.GetNumberFmt());
|
||||
range.base.level = image.base_level;
|
||||
range.base.layer = 0;
|
||||
range.extent.levels = 1;
|
||||
range.extent.layers = 1;
|
||||
mapping.r = ConvertComponentSwizzle(image.dst_sel_x);
|
||||
mapping.g = ConvertComponentSwizzle(image.dst_sel_y);
|
||||
mapping.b = ConvertComponentSwizzle(image.dst_sel_z);
|
||||
mapping.a = ConvertComponentSwizzle(image.dst_sel_w);
|
||||
}
|
||||
|
||||
ImageView::ImageView(const Vulkan::Instance& instance, Vulkan::Scheduler& scheduler,
|
||||
const ImageViewInfo& info_, vk::Image image)
|
||||
: info{info_} {
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
#include "video_core/amdgpu/resource.h"
|
||||
#include "video_core/renderer_vulkan/vk_common.h"
|
||||
#include "video_core/texture_cache/types.h"
|
||||
|
||||
|
|
@ -14,6 +15,9 @@ class Scheduler;
|
|||
namespace VideoCore {
|
||||
|
||||
struct ImageViewInfo {
|
||||
explicit ImageViewInfo() = default;
|
||||
explicit ImageViewInfo(const AmdGpu::Image& image) noexcept;
|
||||
|
||||
vk::ImageViewType type = vk::ImageViewType::e2D;
|
||||
vk::Format format = vk::Format::eR8G8B8A8Unorm;
|
||||
SubresourceRange range;
|
||||
|
|
|
|||
32
src/video_core/texture_cache/sampler.cpp
Normal file
32
src/video_core/texture_cache/sampler.cpp
Normal file
|
|
@ -0,0 +1,32 @@
|
|||
// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "video_core/renderer_vulkan/liverpool_to_vk.h"
|
||||
#include "video_core/renderer_vulkan/vk_instance.h"
|
||||
#include "video_core/texture_cache/sampler.h"
|
||||
|
||||
namespace VideoCore {
|
||||
|
||||
Sampler::Sampler(const Vulkan::Instance& instance, const AmdGpu::Sampler& sampler) {
|
||||
using namespace Vulkan;
|
||||
const vk::SamplerCreateInfo sampler_ci = {
|
||||
.magFilter = LiverpoolToVK::Filter(sampler.xy_mag_filter),
|
||||
.minFilter = LiverpoolToVK::Filter(sampler.xy_min_filter),
|
||||
.mipmapMode = LiverpoolToVK::MipFilter(sampler.mip_filter),
|
||||
.addressModeU = LiverpoolToVK::ClampMode(sampler.clamp_x),
|
||||
.addressModeV = LiverpoolToVK::ClampMode(sampler.clamp_y),
|
||||
.addressModeW = LiverpoolToVK::ClampMode(sampler.clamp_z),
|
||||
.mipLodBias = sampler.LodBias(),
|
||||
.compareEnable = sampler.depth_compare_func != AmdGpu::DepthCompare::Never,
|
||||
.compareOp = LiverpoolToVK::DepthCompare(sampler.depth_compare_func),
|
||||
.minLod = sampler.MinLod(),
|
||||
.maxLod = sampler.MaxLod(),
|
||||
.borderColor = LiverpoolToVK::BorderColor(sampler.border_color_type),
|
||||
.unnormalizedCoordinates = bool(sampler.force_unnormalized),
|
||||
};
|
||||
handle = instance.GetDevice().createSamplerUnique(sampler_ci);
|
||||
}
|
||||
|
||||
Sampler::~Sampler() = default;
|
||||
|
||||
} // namespace VideoCore
|
||||
34
src/video_core/texture_cache/sampler.h
Normal file
34
src/video_core/texture_cache/sampler.h
Normal file
|
|
@ -0,0 +1,34 @@
|
|||
// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "video_core/amdgpu/resource.h"
|
||||
#include "video_core/renderer_vulkan/vk_common.h"
|
||||
|
||||
namespace Vulkan {
|
||||
class Instance;
|
||||
}
|
||||
|
||||
namespace VideoCore {
|
||||
|
||||
class Sampler {
|
||||
public:
|
||||
explicit Sampler(const Vulkan::Instance& instance, const AmdGpu::Sampler& sampler);
|
||||
~Sampler();
|
||||
|
||||
Sampler(const Sampler&) = delete;
|
||||
Sampler& operator=(const Sampler&) = delete;
|
||||
|
||||
Sampler(Sampler&&) = default;
|
||||
Sampler& operator=(Sampler&&) = default;
|
||||
|
||||
vk::Sampler Handle() const noexcept {
|
||||
return *handle;
|
||||
}
|
||||
|
||||
private:
|
||||
vk::UniqueSampler handle;
|
||||
};
|
||||
|
||||
} // namespace VideoCore
|
||||
|
|
@ -1,10 +1,9 @@
|
|||
// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <limits>
|
||||
#include <xxhash.h>
|
||||
#include "common/assert.h"
|
||||
#include "common/config.h"
|
||||
#include "core/libraries/videoout/buffer.h"
|
||||
#include "core/virtual_memory.h"
|
||||
#include "video_core/renderer_vulkan/vk_scheduler.h"
|
||||
#include "video_core/texture_cache/texture_cache.h"
|
||||
|
|
@ -137,6 +136,21 @@ Image& TextureCache::FindImage(const ImageInfo& info, VAddr cpu_address) {
|
|||
return image;
|
||||
}
|
||||
|
||||
ImageView& TextureCache::FindImageView(const AmdGpu::Image& desc) {
|
||||
Image& image = FindImage(ImageInfo{desc}, desc.Address());
|
||||
|
||||
const ImageViewInfo view_info{desc};
|
||||
if (const ImageViewId view_id = image.FindView(view_info); view_id) {
|
||||
return slot_image_views[view_id];
|
||||
}
|
||||
|
||||
const ImageViewId view_id =
|
||||
slot_image_views.insert(instance, scheduler, view_info, image.image);
|
||||
image.image_view_infos.emplace_back(view_info);
|
||||
image.image_view_ids.emplace_back(view_id);
|
||||
return slot_image_views[view_id];
|
||||
}
|
||||
|
||||
ImageView& TextureCache::RenderTarget(const AmdGpu::Liverpool::ColorBuffer& buffer) {
|
||||
const ImageInfo info{buffer};
|
||||
auto& image = FindImage(info, buffer.Address());
|
||||
|
|
@ -159,7 +173,7 @@ void TextureCache::RefreshImage(Image& image) {
|
|||
image.flags &= ~ImageFlagBits::CpuModified;
|
||||
|
||||
// Upload data to the staging buffer.
|
||||
const auto [data, offset, _] = staging.Map(image.info.guest_size_bytes, 0);
|
||||
const auto [data, offset, _] = staging.Map(image.info.guest_size_bytes, 4);
|
||||
const u8* image_data = reinterpret_cast<const u8*>(image.cpu_addr);
|
||||
if (image.info.is_tiled) {
|
||||
ConvertTileToLinear(data, image_data, image.info.size.width, image.info.size.height,
|
||||
|
|
@ -202,6 +216,12 @@ void TextureCache::RefreshImage(Image& image) {
|
|||
vk::AccessFlagBits::eShaderRead | vk::AccessFlagBits::eTransferRead);
|
||||
}
|
||||
|
||||
vk::Sampler TextureCache::GetSampler(const AmdGpu::Sampler& sampler) {
|
||||
const u64 hash = XXH3_64bits(&sampler, sizeof(sampler));
|
||||
const auto [it, new_sampler] = samplers.try_emplace(hash, instance, sampler);
|
||||
return it->second.Handle();
|
||||
}
|
||||
|
||||
void TextureCache::RegisterImage(ImageId image_id) {
|
||||
Image& image = slot_images[image_id];
|
||||
ASSERT_MSG(False(image.flags & ImageFlagBits::Registered),
|
||||
|
|
|
|||
|
|
@ -7,9 +7,11 @@
|
|||
#include <boost/icl/interval_map.hpp>
|
||||
#include <tsl/robin_map.h>
|
||||
|
||||
#include "video_core/amdgpu/resource.h"
|
||||
#include "video_core/renderer_vulkan/vk_stream_buffer.h"
|
||||
#include "video_core/texture_cache/image.h"
|
||||
#include "video_core/texture_cache/image_view.h"
|
||||
#include "video_core/texture_cache/sampler.h"
|
||||
#include "video_core/texture_cache/slot_vector.h"
|
||||
|
||||
namespace Core::Libraries::VideoOut {
|
||||
|
|
@ -36,12 +38,18 @@ public:
|
|||
/// Retrieves the image handle of the image with the provided attributes and address.
|
||||
Image& FindImage(const ImageInfo& info, VAddr cpu_address);
|
||||
|
||||
/// Retrieves an image view with the properties of the specified image descriptor.
|
||||
ImageView& FindImageView(const AmdGpu::Image& image);
|
||||
|
||||
/// Retrieves the render target with specified properties
|
||||
ImageView& RenderTarget(const AmdGpu::Liverpool::ColorBuffer& buffer);
|
||||
|
||||
/// Reuploads image contents.
|
||||
void RefreshImage(Image& image);
|
||||
|
||||
/// Retrieves the sampler that matches the provided S# descriptor.
|
||||
vk::Sampler GetSampler(const AmdGpu::Sampler& sampler);
|
||||
|
||||
private:
|
||||
/// Iterate over all page indices in a range
|
||||
template <typename Func>
|
||||
|
|
@ -121,6 +129,7 @@ private:
|
|||
Vulkan::StreamBuffer staging;
|
||||
SlotVector<Image> slot_images;
|
||||
SlotVector<ImageView> slot_image_views;
|
||||
tsl::robin_map<u64, Sampler> samplers;
|
||||
tsl::robin_pg_map<u64, std::vector<ImageId>> page_table;
|
||||
boost::icl::interval_map<VAddr, s32> cached_pages;
|
||||
#ifdef _WIN64
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <cstring>
|
||||
#include "common/assert.h"
|
||||
#include "video_core/texture_cache/tile_manager.h"
|
||||
|
||||
namespace VideoCore {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue