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Misc fixes
This commit is contained in:
parent
7f727340aa
commit
ecd73ebd67
3 changed files with 19 additions and 10 deletions
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@ -14,7 +14,7 @@ CopyShaderData ParseCopyShader(std::span<const u32> code) {
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constexpr u32 token_mov_vcchi = 0xBEEB03FF;
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constexpr u32 token_mov_vcchi = 0xBEEB03FF;
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ASSERT_MSG(code[0] == token_mov_vcchi, "First instruction is not s_mov_b32 vcc_hi, #imm");
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ASSERT_MSG(code[0] == token_mov_vcchi, "First instruction is not s_mov_b32 vcc_hi, #imm");
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std::array<s32, 32> offsets{};
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std::array<s32, 64> offsets{};
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offsets.fill(-1);
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offsets.fill(-1);
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std::array<s32, 256> sources{};
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std::array<s32, 256> sources{};
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@ -52,6 +52,8 @@ CopyShaderData ParseCopyShader(std::span<const u32> code) {
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break;
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break;
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}
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}
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case Gcn::Opcode::BUFFER_LOAD_DWORD: {
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case Gcn::Opcode::BUFFER_LOAD_DWORD: {
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ASSERT_MSG(inst.src[1].code < offsets.size(),
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"offsets array for geometry shaders is too short");
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offsets[inst.src[1].code] = inst.control.mubuf.offset;
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offsets[inst.src[1].code] = inst.control.mubuf.offset;
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if (inst.src[3].field != Gcn::OperandField::ConstZero) {
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if (inst.src[3].field != Gcn::OperandField::ConstZero) {
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const u32 index = inst.src[3].code;
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const u32 index = inst.src[3].code;
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@ -66,7 +68,10 @@ CopyShaderData ParseCopyShader(std::span<const u32> code) {
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}
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}
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if (last_attr != IR::Attribute::Position0) {
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if (last_attr != IR::Attribute::Position0) {
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data.num_attrs = static_cast<u32>(last_attr) - static_cast<u32>(IR::Attribute::Param0) + 1;
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data.num_attrs =
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last_attr >= IR::Attribute::Param0
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? static_cast<u32>(last_attr) - static_cast<u32>(IR::Attribute::Param0) + 1
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: 0;
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const auto it = data.attr_map.begin();
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const auto it = data.attr_map.begin();
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const u32 comp_stride = std::next(it)->first - it->first;
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const u32 comp_stride = std::next(it)->first - it->first;
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data.output_vertices = comp_stride / 64;
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data.output_vertices = comp_stride / 64;
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@ -142,7 +142,10 @@ void RingAccessElimination(const IR::Program& program, const RuntimeInfo& runtim
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const auto vc_read_ofs = (((offset / comp_ofs) * comp_ofs) % output_size) * 16u;
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const auto vc_read_ofs = (((offset / comp_ofs) * comp_ofs) % output_size) * 16u;
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const auto& it = info.gs_copy_data.attr_map.find(vc_read_ofs);
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const auto& it = info.gs_copy_data.attr_map.find(vc_read_ofs);
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ASSERT(it != info.gs_copy_data.attr_map.cend());
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if (it == info.gs_copy_data.attr_map.cend()) {
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LOG_ERROR(Render_Recompiler, "attr_map missing entry: {}", vc_read_ofs);
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inst.Invalidate();
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} else {
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const auto& [attr, comp] = it->second;
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const auto& [attr, comp] = it->second;
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inst.ReplaceOpcode(IR::Opcode::SetAttribute);
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inst.ReplaceOpcode(IR::Opcode::SetAttribute);
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@ -150,6 +153,7 @@ void RingAccessElimination(const IR::Program& program, const RuntimeInfo& runtim
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inst.SetArg(0, IR::Value{attr});
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inst.SetArg(0, IR::Value{attr});
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inst.SetArg(1, data);
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inst.SetArg(1, data);
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inst.SetArg(2, ir.Imm32(comp));
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inst.SetArg(2, ir.Imm32(comp));
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}
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break;
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break;
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}
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}
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default:
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default:
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@ -699,7 +699,7 @@ struct PM4CmdWaitRegMem {
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struct PM4CmdWriteData {
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struct PM4CmdWriteData {
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PM4Type3Header header;
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PM4Type3Header header;
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union {
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union {
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BitField<8, 11, u32> dst_sel;
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BitField<8, 4, u32> dst_sel;
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BitField<16, 1, u32> wr_one_addr;
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BitField<16, 1, u32> wr_one_addr;
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BitField<20, 1, u32> wr_confirm;
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BitField<20, 1, u32> wr_confirm;
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BitField<30, 1, u32> engine_sel;
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BitField<30, 1, u32> engine_sel;
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