s_flbit_i32_b64 (#3033)

* s_flbit_i32_b64

* Split FindUMsb64 into two 32bit ops

src/shader_recompiler/backend/spirv/emit_spirv_instructions.h

@@ -372,6 +372,7 @@ Id EmitBitCount64(EmitContext& ctx, Id value);
 Id EmitBitwiseNot32(EmitContext& ctx, Id value);
 Id EmitFindSMsb32(EmitContext& ctx, Id value);
 Id EmitFindUMsb32(EmitContext& ctx, Id value);
+Id EmitFindUMsb64(EmitContext& ctx, Id value);
 Id EmitFindILsb32(EmitContext& ctx, Id value);
 Id EmitFindILsb64(EmitContext& ctx, Id value);
 Id EmitSMin32(EmitContext& ctx, Id a, Id b);

src/shader_recompiler/backend/spirv/emit_spirv_integer.cpp

@@ -229,6 +229,20 @@ Id EmitFindUMsb32(EmitContext& ctx, Id value) {
     return ctx.OpFindUMsb(ctx.U32[1], value);
 }
 
+Id EmitFindUMsb64(EmitContext& ctx, Id value) {
+    // Vulkan restricts some bitwise operations to 32-bit only, so decompose into
+    // two 32-bit values and select the correct result.
+    const Id unpacked{ctx.OpBitcast(ctx.U32[2], value)};
+    const Id hi{ctx.OpCompositeExtract(ctx.U32[1], unpacked, 1U)};
+    const Id lo{ctx.OpCompositeExtract(ctx.U32[1], unpacked, 0U)};
+    const Id hi_msb{ctx.OpFindUMsb(ctx.U32[1], hi)};
+    const Id lo_msb{ctx.OpFindUMsb(ctx.U32[1], lo)};
+    const Id found_hi{ctx.OpINotEqual(ctx.U1[1], hi_msb, ctx.ConstU32(u32(-1)))};
+    const Id shifted_hi{ctx.OpIAdd(ctx.U32[1], hi_msb, ctx.ConstU32(32u))};
+    // value == 0 case is checked in IREmitter
+    return ctx.OpSelect(ctx.U32[1], found_hi, shifted_hi, lo_msb);
+}
+
 Id EmitFindILsb32(EmitContext& ctx, Id value) {
     return ctx.OpFindILsb(ctx.U32[1], value);
 }

src/shader_recompiler/frontend/translate/scalar_alu.cpp

@@ -114,6 +114,8 @@ void Translator::EmitScalarAlu(const GcnInst& inst) {
             return S_FF1_I32_B64(inst);
         case Opcode::S_FLBIT_I32_B32:
             return S_FLBIT_I32_B32(inst);
+        case Opcode::S_FLBIT_I32_B64:
+            return S_FLBIT_I32_B64(inst);
         case Opcode::S_BITSET0_B32:
             return S_BITSET_B32(inst, 0);
         case Opcode::S_BITSET1_B32:
@@ -686,6 +688,17 @@ void Translator::S_FLBIT_I32_B32(const GcnInst& inst) {
     SetDst(inst.dst[0], IR::U32{ir.Select(cond, pos_from_left, ir.Imm32(~0U))});
 }
 
+void Translator::S_FLBIT_I32_B64(const GcnInst& inst) {
+    const IR::U64 src0{GetSrc64(inst.src[0])};
+    // Gcn wants the MSB position counting from the left, but SPIR-V counts from the rightmost (LSB)
+    // position
+    const IR::U32 msb_pos = ir.FindUMsb(src0);
+    const IR::U32 pos_from_left = ir.ISub(ir.Imm32(63), msb_pos);
+    // Select 0xFFFFFFFF if src0 was 0
+    const IR::U1 cond = ir.INotEqual(src0, ir.Imm64(u64(0u)));
+    SetDst(inst.dst[0], IR::U32{ir.Select(cond, pos_from_left, ir.Imm32(~0U))});
+}
+
 void Translator::S_BITSET_B32(const GcnInst& inst, u32 bit_value) {
     const IR::U32 old_value{GetSrc(inst.dst[0])};
     const IR::U32 offset{ir.BitFieldExtract(GetSrc(inst.src[0]), ir.Imm32(0U), ir.Imm32(5U))};

src/shader_recompiler/frontend/translate/translate.h

@@ -121,6 +121,7 @@ public:
     void S_FF1_I32_B32(const GcnInst& inst);
     void S_FF1_I32_B64(const GcnInst& inst);
     void S_FLBIT_I32_B32(const GcnInst& inst);
+    void S_FLBIT_I32_B64(const GcnInst& inst);
     void S_BITSET_B32(const GcnInst& inst, u32 bit_value);
     void S_GETPC_B64(u32 pc, const GcnInst& inst);
     void S_SAVEEXEC_B64(NegateMode negate, bool is_or, const GcnInst& inst);

src/shader_recompiler/ir/ir_emitter.cpp

@@ -1546,8 +1546,15 @@ U32 IREmitter::FindSMsb(const U32& value) {
     return Inst<U32>(Opcode::FindSMsb32, value);
 }
 
-U32 IREmitter::FindUMsb(const U32& value) {
-    return Inst<U32>(Opcode::FindUMsb32, value);
+U32 IREmitter::FindUMsb(const U32U64& value) {
+    switch (value.Type()) {
+    case Type::U32:
+        return Inst<U32>(Opcode::FindUMsb32, value);
+    case Type::U64:
+        return Inst<U32>(Opcode::FindUMsb64, value);
+    default:
+        ThrowInvalidType(value.Type());
+    }
 }
 
 U32 IREmitter::FindILsb(const U32U64& value) {

src/shader_recompiler/ir/ir_emitter.h

@@ -266,7 +266,7 @@ public:
     [[nodiscard]] U32 BitwiseNot(const U32& value);
 
     [[nodiscard]] U32 FindSMsb(const U32& value);
-    [[nodiscard]] U32 FindUMsb(const U32& value);
+    [[nodiscard]] U32 FindUMsb(const U32U64& value);
     [[nodiscard]] U32 FindILsb(const U32U64& value);
     [[nodiscard]] U32 SMin(const U32& a, const U32& b);
     [[nodiscard]] U32 UMin(const U32& a, const U32& b);

src/shader_recompiler/ir/opcodes.inc

@@ -349,6 +349,7 @@ OPCODE(BitwiseNot32,                                        U32,            U32,
 
 OPCODE(FindSMsb32,                                          U32,            U32,                                                                            )
 OPCODE(FindUMsb32,                                          U32,            U32,                                                                            )
+OPCODE(FindUMsb64,                                          U32,            U64,                                                                            )
 OPCODE(FindILsb32,                                          U32,            U32,                                                                            )
 OPCODE(FindILsb64,                                          U32,            U64,                                                                            )
 OPCODE(SMin32,                                              U32,            U32,            U32,                                                            )