Commit graph

88 commits

Author SHA1 Message Date
Marcin Mikołajczyk
8fffdc3918
Handle V_CVT_F64_U32 (#3008)
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2025-05-29 12:20:16 -07:00
Dmugetsu
ddc05e8a5f
Implementing DS_SUB_U32, DS_INC_U32, DS_DEC_U32. (#2797)
* Implementing DS_SUB_U32, DS_INC_U32, DS_DEC_U32, DS_WRITE_SRC2_B32, DS_WRITE_SRC2_B64.

* Added ir instructions for new opcodes.
Removing Write implementations.
Maping operation S_BFE_I32 as it was added in translate but wasnt pointing to anything.

* Suggestions
2025-04-16 17:56:27 -07:00
Fire Cube
aa8dab5371
shader_recompiler: Implement S_SUBB_U32 instruction (#2796)
* add S_SUBB_U32 instruction

* add missing case

* move case to match enum
2025-04-16 14:24:18 -07:00
squidbus
52ab1ed04b
shader_recompiler: Implement S_FLBIT_I32_B32 and V_MUL_HI_I32. (#2793) 2025-04-16 18:08:09 +03:00
squidbus
afd0251dd2
shader_recompiler: Use VK_AMD_shader_trinary_minmax when available. (#2739)
* shader_recompiler: Use VK_AMD_shader_trinary_minmax when available.

* shader_recompiler: Simplify signed/unsigned trinary instruction variants.
2025-04-02 23:36:54 +03:00
Paris Oplopoios
fd3bfdae80
Implement some RDNA flags (#2510) 2025-02-24 19:52:57 +02:00
squidbus
9424047214
shader_recompiler: Proper support for inst-typed buffer format operations. (#2469) 2025-02-21 03:01:18 -08:00
squidbus
fd3d3c4158
shader_recompiler: Implement AMD buffer bounds checking behavior. (#2448)
* shader_recompiler: Implement AMD buffer bounds checking behavior.

* shader_recompiler: Use SRT flatbuf for bounds check size.

* shader_recompiler: Fix buffer atomic bounds check.

* buffer_cache: Prevent false image-to-buffer sync.

Lowering vertex fetch to formatted buffer surfaced an issue where a CPU modified range may be overwritten with stale GPU modified image data.

* Address review comments.
2025-02-17 16:13:39 +02:00
TheTurtle
82cacec8eb
shader_recompiler: Remove special case buffers and add support for aliasing (#2428)
* shader_recompiler: Move shared mem lowering into emitter

* IR can be quite verbose during first stages of translation, before ssa and constant prop passes have run that drastically simplify it. This lowering can also be done during emission so why not do it then to save some compilation time

* runtime_info: Pack PsColorBuffer into 8 bytes

* Drops the size of the total structure by half from 396 to 204 bytes. Also should make comparison of the array a bit faster, since its a hot path done every draw

* emit_spirv_context: Add infrastructure for buffer aliases

* Splits out the buffer creation function so it can be reused when defining multiple type aliases

* shader_recompiler: Merge srt_flatbuf into buffers list

* Its no longer a special case, yay

* shader_recompiler: Complete buffer aliasing support

* Add a bunch more types into buffers, such as F32 for float reads/writes and 8/16 bit integer types for formatted buffers

* shader_recompiler: Remove existing shared memory emulation

* The current impl relies on backend side implementaton and hooking into every shared memory access. It also doesnt handle atomics. Will be replaced by an IR pass that solves these issues

* shader_recompiler: Reintroduce shared memory on ssbo emulation

* Now it is performed with an IR pass, and combined with the previous commit cleanup, is fully transparent from the backend, other than requiring workgroup_index be provided as an attribute (computing this on every shared memory access is gonna be too verbose

* clang format

* buffer_cache: Reduce buffer sizes

* vk_rasterizer: Cleanup resource binding code

* Reduce noise in the functions, also remove some arguments which are class members

* Fix gcc
2025-02-15 14:06:56 +02:00
squidbus
56f4b8a2b8
shader_recompiler: Implement shader export formats. (#2226) 2025-01-24 10:41:58 -08:00
Marcin Mikołajczyk
9dcf40e261
Handle more 64bit shifts in Translator (#1825) 2025-01-24 03:07:36 -08:00
squidbus
725814ce01
shader_recompiler: Improvements to array and cube handling. (#2083)
* shader_recompiler: Account for instruction array flag in image type.

* shader_recompiler: Check da flag for all mimg instructions.

* shader_recompiler: Convert cube images into 2D arrays.

* shader_recompiler: Move image resource functions into sharp type.

* shader_recompiler: Use native AMD cube instructions when possible.

* specialization: Fix buffer storage mistake.
2025-01-10 10:48:12 +02:00
squidbus
8879380427
shader_recompiler: Implement S_BITSET(0/1)_B32 (#2039) 2025-01-06 01:08:27 +02:00
TheTurtle
dcc662ff1a
ir_passes: Integrate DS barriers in block (#2020) 2025-01-02 22:52:10 +02:00
squidbus
b1f74660df
shader_recompiler: Implement S_BCNT1_I32_B64 and S_FF1_I32_B64 (#1889)
* shader_recompiler: Implement S_BCNT1_I32_B64

* shader_recompiler: Implement S_FF1_I32_B64

* shader_recompiler: Implement IEqual for 64-bit.

* shader_recompiler: Fix immediate type in S_FF1_I32_B32
2024-12-27 16:46:07 +02:00
IndecisiveTurtle
7b24b42711 data_share: Emit barrier before reads
* Fixes artifacts in TLG when using NVIDIA gpus. When LDS is written and read in the same basic block, the barrier pass wont handle it properly, so insert a barrier before reads
2024-12-24 16:04:30 +02:00
Stephen Miller
32435674f2
Misc UE4 fixes (#1821)
* Add ExecLo case to S_SAVEEXEC_B64

Seen in CUSA38209

* S_BCNT1_I32_B32

Turtle said our implementation of S_BCNT1_I32_B64 was meant to be for S_BCNT1_I32_B32, so renaming the opcode is the fix.
2024-12-18 22:05:35 +02:00
baggins183
9aa1c13c7e
Fix some compiler problems with ds3 (#1793)
- Implement S_CMOVK_I32
- Handle Isoline abstract patch type
2024-12-15 16:30:19 +02:00
baggins183
3c0c921ef5
Tessellation (#1528)
* shader_recompiler: Tessellation WIP

* fix compiler errors after merge

DONT MERGE set log file to /dev/null

DONT MERGE linux pthread bb fix

save work

DONT MERGE dump ir

save more work

fix mistake with ES shader

skip list

add input patch control points dynamic state

random stuff

* WIP Tessellation partial implementation. Squash commits

* test: make local/tcs use attr arrays

* attr arrays in TCS/TES

* dont define empty attr arrays

* switch to special opcodes for tess tcs/tes reads and tcs writes

* impl tcs/tes read attr insts

* rebase fix

* save some work

* save work probably broken and slow

* put Vertex LogicalStage after TCS and TES to fix bindings

* more refactors

* refactor pattern matching and optimize modulos (disabled)

* enable modulo opt

* copyright

* rebase fixes

* remove some prints

* remove some stuff

* Add TCS/TES support for shader patching and use LogicalStage

* refactor and handle wider DS instructions

* get rid of GetAttributes for special tess constants reads. Immediately replace some upon seeing readconstbuffer. Gets rid of some extra passes over IR

* stop relying on GNMX HsConstants struct. Change runtime_info.hs_info and some regs

* delete some more stuff

* update comments for current implementation

* some cleanup

* uint error

* more cleanup

* remove patch control points dynamic state (because runtime_info already depends on it)

* fix potential problem with determining passthrough

---------

Co-authored-by: IndecisiveTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2024-12-14 12:56:17 +02:00
squidbus
8caca4df32
shader_recompiler: Support VK_AMD_shader_image_load_store_lod for IMAGE_STORE_MIP (#1770)
* shader_recompiler: Support VK_AMD_shader_image_load_store_lod for IMAGE_STORE_MIP

* emit_spirv: Fix missing extension declaration.
2024-12-14 12:03:42 +02:00
squidbus
f1c23d514b
shader_recompiler: Implement FREXP instructions. (#1766) 2024-12-13 21:51:39 +02:00
squidbus
0b59ebb22f
shader_recompiler: Implement S_ABS_I32 (#1713) 2024-12-09 12:12:33 +01:00
IndecisiveTurtle
cde84e4bac shader_recompiler: Fix mistake 2024-12-07 23:45:23 +02:00
IndecisiveTurtle
77da8bac00 core: Return proper address of eh frame/add more opcodes 2024-12-06 00:47:11 +02:00
Jamie Tong
b0860d6e8c
implement DS_AND_B32, DS_OR_B32, DS_XOR_B32 (#1593)
* implement DS_OR_B32

* implement DS_AND_B32, DS_XOR_B32
2024-11-30 22:39:11 +02:00
Daniel R.
6904764aab
shader_recompiler/frontend: implement V_MIN3_U32 2024-11-21 19:52:48 +01:00
Ruah Devlin
96cd79f272
Implement V_MED3_U32 vector ALU Opcode (#1553) 2024-11-20 17:23:59 +01:00
Daniel R.
17c47bcd96
shader_recompiler/frontend: Implement bitcmp instructions (#1550) 2024-11-19 21:38:32 +01:00
TheTurtle
87f8fea4de
renderer_vulkan: Commize and adjust buffer bindings (#1412)
* shader_recompiler: Implement finite cmp class

* shader_recompiler: Implement more opcodes

* renderer_vulkan: Commonize buffer binding

* liverpool: More dma data impl

* fix

* copy_shader: Handle additional instructions from Knack

* translator: Add V_CMPX_GE_I32
2024-10-19 15:30:58 +03:00
squidbus
09cbccb40b
shader_recompiler: Implement V_SUBB_U32 and V_SUBBREV_U32. (#1331) 2024-10-10 19:40:19 +03:00
psucien
927bb0c175
Initial support of Geometry shaders (#1244)
* video_core: initial GS support

* fix for components mapping; missing prim type
2024-10-06 01:26:50 +03:00
korenkonder
9f79764b01
Add various V_CVT opcodes (#1223) 2024-10-04 08:48:05 +02:00
korenkonder
da519f9091
Moved opcode to it's proper location (#1221) 2024-10-03 22:47:26 +02:00
dbz400
54dafce541
Add V_CVT_F64_I32 (#1219) 2024-10-03 18:48:28 +02:00
TheTurtle
ee38eec7fe
shader_recompiler: Additional scope handling and user data as push constants (#1013)
* shader_recompiler: Use push constants for user data regs

* shader: Add some GR2 instructions

* shader: Add some instructions

* shader: Add instructions for knack

* touchups

* spirv: Better names

* buffer_cache: Ignore non gpu modified images

* clang format

* Add log

* more fixes
2024-09-23 08:55:43 +02:00
korenkonder
8811cc5cc6
Add V_CVT_PK_U8_F32 opcode (#1022) 2024-09-22 15:02:34 +03:00
korenkonder
07de1ee977
Sort opcodes by their indices. Group them too when applicable (#945) 2024-09-19 20:29:56 +02:00
Raven
84e2c4d3bb
Add other 64-bit floating point shader instructions (#944) 2024-09-17 18:01:33 +02:00
Daniel R.
dcf245b814
shader_recompiler: Implement basic 64-bit floating point support (#915)
* shader_recompiler: Implement basic 64-bit floating point support

* Fix formatting
2024-09-15 22:53:08 +02:00
Raven
b14f447060
Add DS_READ2ST64_B32 (#916)
* Add DS_READ2ST64_B32

* Fix CLANG

* Fix CI again

* Parameter update for DS_READ
2024-09-14 21:16:12 +03:00
Raven
5c5c02cb04
Add S_XOR_B32 opcode (#911)
* Add S_XOR_B32

* Stub S_OR_B32
2024-09-14 18:52:30 +03:00
Luke Warner
c181102a02
Implement S_ABSDIFF_I32 shader instruction (#902) 2024-09-13 19:02:17 +02:00
Andrew Middendorp
4502a5ddcc
Added S_ANDN2_B32 and S_NAND_B32 opcodes (#833)
* Added S_ANDN2_B32 and S_NAND_B32 opcodes

* Update src/shader_recompiler/frontend/translate/scalar_alu.cpp

Co-authored-by: baggins183 <baggins31084@proton.me>

* Fix result and src1

Co-authored-by: baggins183 <baggins31084@proton.me>

* update result

Co-authored-by: baggins183 <baggins31084@proton.me>

* Update src1

Co-authored-by: baggins183 <baggins31084@proton.me>

---------

Co-authored-by: baggins183 <baggins31084@proton.me>
2024-09-09 22:46:57 +03:00
TheTurtle
13743b27fc
shader_recompiler: Implement data share append and consume operations (#814)
* shader_recompiler: Add more format swap modes

* texture_cache: Handle stencil texture reads

* emulator: Support loading font library

* readme: Add thanks section

* shader_recompiler: Constant buffers as integers

* shader_recompiler: Typed buffers as integers

* shader_recompiler: Separate thread bit scalars

* We can assume guest shader never mixes them with normal sgprs. This helps avoid errors where ssa could view an sgpr write dominating a thread bit read, due to how control flow is structurized, even though its not possible in actual control flow

* shader_recompiler: Implement data append/consume operations

* clang format

* buffer_cache: Simplify invalidation scheme

* video_core: Remove some invalidation remnants

* adjust
2024-09-07 00:14:51 +03:00
baggins183
bb29224daf
Implement V_MOVREL variants (#745)
* shader_recompiler: Implement V_MOVRELS_B32, V_MOVRELD_B32,
V_MOVRELSD_B32

Generates a ton of OpSelects to hardcode reading or writing from each
possible vgpr depending on the value of m0

Future work is to do range analysis to put an upper bound on m0 and
check fewer registers.

* fix runtime info after rebase
2024-09-06 23:47:47 +03:00
TheTurtle
f087f43736
shader_recompiler: Implement render target swizzles when no format is available (#739)
* shader_recompiler: Use null image when shader is compiled with unbound sharp

* video_core: Refactor and render target swizzles

* liverpool_to_vk: Add missing swap format from RDR

* video_core: Refactor shader recompiler interface

* Makes it much easier to pass runtime information to the recompiler and have it treated as part of the shader key. Also pulls out most runtime state from Info struct

* shader_recompiler: Avoid some asserts
2024-09-03 14:04:30 +03:00
baggins183
101aeb920d
Implement V_BFM_B32 and V_FFBH_U32 (#663)
* Implement V_BFM_B32

* Render.Recompiler: Implement V_FFBH_U32

* fix clang-format
2024-09-01 22:20:42 +03:00
TheTurtle
66e96dd944
video_core: Account of runtime state changes when compiling shaders (#575)
* video_core: Compile shader permutations

* spirv: Only specific storage image format for atomics

* ir: Avoid cube coord patching for storage image

* spirv: Fix default attributes

* data_share: Add more instructions

* video_core: Query storage flag with runtime state

* kernel: Use std::list for semaphore

* video_core: Use texture buffers for untyped format load/store

* buffer_cache: Limit view usage

* vk_pipeline_cache: Fix invalid iterator

* image_view: Reduce log spam when alpha=1 in storage swizzle

* video_core: More features and proper spirv feature detection

* video_core: Attempt no2 for specialization

* spirv: Remove conflict

* vk_shader_cache: Small cleanup
2024-08-29 19:29:54 +03:00
psucien
3fbb68048e
shader_recompiler: frontend: SOPC and SOPK handling separated; more cmp opcodes (#634) 2024-08-28 22:27:47 +02:00
Grégoire Hage
288db9a0cf
Implement V_LSHL_B64 (#608) 2024-08-27 14:15:32 +03:00