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333 lines
15 KiB
C++
333 lines
15 KiB
C++
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/div_ceil.h"
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#include "shader_recompiler/backend/spirv/emit_spirv_bounds.h"
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#include "shader_recompiler/backend/spirv/emit_spirv_instructions.h"
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#include "shader_recompiler/backend/spirv/spirv_emit_context.h"
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namespace Shader::Backend::SPIRV {
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namespace {
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std::pair<Id, Id> AtomicArgs(EmitContext& ctx) {
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const Id scope{ctx.ConstU32(static_cast<u32>(spv::Scope::Device))};
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const Id semantics{ctx.u32_zero_value};
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return {scope, semantics};
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}
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Id SharedAtomicU32(EmitContext& ctx, Id offset, Id value,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id)) {
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const Id shift_id{ctx.ConstU32(2U)};
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const Id index{ctx.OpShiftRightLogical(ctx.U32[1], offset, shift_id)};
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const u32 num_elements{Common::DivCeil(ctx.runtime_info.cs_info.shared_memory_size, 4u)};
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const Id pointer{ctx.EmitSharedMemoryAccess(ctx.shared_u32, ctx.shared_memory_u32, index)};
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return AccessBoundsCheck<32>(ctx, index, ctx.ConstU32(num_elements), [&] {
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return (ctx.*atomic_func)(ctx.U32[1], pointer, scope, semantics, value);
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});
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}
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Id SharedAtomicU32IncDec(EmitContext& ctx, Id offset,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id)) {
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const Id shift_id{ctx.ConstU32(2U)};
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const Id index{ctx.OpShiftRightLogical(ctx.U32[1], offset, shift_id)};
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const u32 num_elements{Common::DivCeil(ctx.runtime_info.cs_info.shared_memory_size, 4u)};
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const Id pointer{ctx.EmitSharedMemoryAccess(ctx.shared_u32, ctx.shared_memory_u32, index)};
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return AccessBoundsCheck<32>(ctx, index, ctx.ConstU32(num_elements), [&] {
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return (ctx.*atomic_func)(ctx.U32[1], pointer, scope, semantics);
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});
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}
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Id SharedAtomicU64(EmitContext& ctx, Id offset, Id value,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id)) {
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const Id shift_id{ctx.ConstU32(3U)};
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const Id index{ctx.OpShiftRightLogical(ctx.U32[1], offset, shift_id)};
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const u32 num_elements{Common::DivCeil(ctx.runtime_info.cs_info.shared_memory_size, 8u)};
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const Id pointer{ctx.EmitSharedMemoryAccess(ctx.shared_u64, ctx.shared_memory_u64, index)};
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return AccessBoundsCheck<64>(ctx, index, ctx.ConstU32(num_elements), [&] {
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return (ctx.*atomic_func)(ctx.U64, pointer, scope, semantics, value);
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});
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}
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Id BufferAtomicU32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id)) {
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const auto& buffer = ctx.buffers[handle];
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if (Sirit::ValidId(buffer.offset)) {
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address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
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}
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const Id index = ctx.OpShiftRightLogical(ctx.U32[1], address, ctx.ConstU32(2u));
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const auto [id, pointer_type] = buffer[EmitContext::PointerType::U32];
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const Id ptr = ctx.OpAccessChain(pointer_type, id, ctx.u32_zero_value, index);
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return AccessBoundsCheck<32>(ctx, index, buffer.size_dwords, [&] {
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return (ctx.*atomic_func)(ctx.U32[1], ptr, scope, semantics, value);
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});
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}
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Id BufferAtomicU32IncDec(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id)) {
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const auto& buffer = ctx.buffers[handle];
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if (Sirit::ValidId(buffer.offset)) {
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address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
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}
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const Id index = ctx.OpShiftRightLogical(ctx.U32[1], address, ctx.ConstU32(2u));
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const auto [id, pointer_type] = buffer[EmitContext::PointerType::U32];
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const Id ptr = ctx.OpAccessChain(pointer_type, id, ctx.u32_zero_value, index);
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return AccessBoundsCheck<32>(ctx, index, buffer.size_dwords, [&] {
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return (ctx.*atomic_func)(ctx.U32[1], ptr, scope, semantics);
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});
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}
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Id BufferAtomicU32CmpSwap(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value,
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Id cmp_value,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id, Id, Id)) {
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const auto& buffer = ctx.buffers[handle];
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if (Sirit::ValidId(buffer.offset)) {
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address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
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}
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const Id index = ctx.OpShiftRightLogical(ctx.U32[1], address, ctx.ConstU32(2u));
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const auto [id, pointer_type] = buffer[EmitContext::PointerType::U32];
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const Id ptr = ctx.OpAccessChain(pointer_type, id, ctx.u32_zero_value, index);
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return AccessBoundsCheck<32>(ctx, index, buffer.size_dwords, [&] {
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return (ctx.*atomic_func)(ctx.U32[1], ptr, scope, semantics, semantics, value, cmp_value);
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});
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}
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Id BufferAtomicU64(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id)) {
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const auto& buffer = ctx.buffers[handle];
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if (Sirit::ValidId(buffer.offset)) {
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address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
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}
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const Id index = ctx.OpShiftRightLogical(ctx.U32[1], address, ctx.ConstU32(3u));
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const auto [id, pointer_type] = buffer[EmitContext::PointerType::U64];
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const Id ptr = ctx.OpAccessChain(pointer_type, id, ctx.u32_zero_value, index);
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return AccessBoundsCheck<64>(ctx, index, buffer.size_qwords, [&] {
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return (ctx.*atomic_func)(ctx.U64, ptr, scope, semantics, value);
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});
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}
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Id ImageAtomicU32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id)) {
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const auto& texture = ctx.images[handle & 0xFFFF];
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const Id pointer{ctx.OpImageTexelPointer(ctx.image_u32, texture.id, coords, ctx.ConstU32(0U))};
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return (ctx.*atomic_func)(ctx.U32[1], pointer, scope, semantics, value);
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}
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Id ImageAtomicF32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value,
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Id (Sirit::Module::*atomic_func)(Id, Id, Id, Id, Id)) {
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const auto& texture = ctx.images[handle & 0xFFFF];
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const Id pointer{ctx.OpImageTexelPointer(ctx.image_f32, texture.id, coords, ctx.ConstU32(0U))};
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return (ctx.*atomic_func)(ctx.F32[1], pointer, scope, semantics, value);
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}
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} // Anonymous namespace
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Id EmitSharedAtomicIAdd32(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicIAdd);
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}
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Id EmitSharedAtomicIAdd64(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU64(ctx, offset, value, &Sirit::Module::OpAtomicIAdd);
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}
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Id EmitSharedAtomicUMax32(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicUMax);
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}
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Id EmitSharedAtomicSMax32(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicSMax);
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}
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Id EmitSharedAtomicUMin32(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicUMin);
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}
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Id EmitSharedAtomicSMin32(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicSMin);
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}
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Id EmitSharedAtomicAnd32(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicAnd);
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}
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Id EmitSharedAtomicOr32(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicOr);
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}
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Id EmitSharedAtomicXor32(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicXor);
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}
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Id EmitSharedAtomicISub32(EmitContext& ctx, Id offset, Id value) {
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return SharedAtomicU32(ctx, offset, value, &Sirit::Module::OpAtomicISub);
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}
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Id EmitSharedAtomicInc32(EmitContext& ctx, Id offset) {
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return SharedAtomicU32IncDec(ctx, offset, &Sirit::Module::OpAtomicIIncrement);
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}
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Id EmitSharedAtomicDec32(EmitContext& ctx, Id offset) {
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return SharedAtomicU32IncDec(ctx, offset, &Sirit::Module::OpAtomicIDecrement);
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}
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Id EmitBufferAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicIAdd);
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}
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Id EmitBufferAtomicIAdd64(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU64(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicIAdd);
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}
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Id EmitBufferAtomicISub32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicISub);
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}
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Id EmitBufferAtomicSMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicSMin);
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}
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Id EmitBufferAtomicUMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicUMin);
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}
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Id EmitBufferAtomicSMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicSMax);
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}
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Id EmitBufferAtomicUMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicUMax);
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}
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Id EmitBufferAtomicInc32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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return BufferAtomicU32IncDec(ctx, inst, handle, address, &Sirit::Module::OpAtomicIIncrement);
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}
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Id EmitBufferAtomicDec32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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return BufferAtomicU32IncDec(ctx, inst, handle, address, &Sirit::Module::OpAtomicIDecrement);
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}
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Id EmitBufferAtomicAnd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicAnd);
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}
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Id EmitBufferAtomicOr32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicOr);
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}
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Id EmitBufferAtomicXor32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicXor);
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}
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Id EmitBufferAtomicSwap32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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return BufferAtomicU32(ctx, inst, handle, address, value, &Sirit::Module::OpAtomicExchange);
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}
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Id EmitBufferAtomicCmpSwap32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value,
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Id cmp_value) {
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return BufferAtomicU32CmpSwap(ctx, inst, handle, address, value, cmp_value,
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&Sirit::Module::OpAtomicCompareExchange);
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}
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Id EmitImageAtomicIAdd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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return ImageAtomicU32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicIAdd);
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}
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Id EmitImageAtomicSMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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return ImageAtomicU32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicSMin);
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}
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Id EmitImageAtomicUMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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return ImageAtomicU32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicUMin);
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}
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Id EmitImageAtomicSMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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return ImageAtomicU32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicSMax);
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}
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Id EmitImageAtomicUMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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return ImageAtomicU32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicUMax);
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}
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Id EmitImageAtomicFMax32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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if (ctx.profile.supports_image_fp32_atomic_min_max) {
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return ImageAtomicF32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicFMax);
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}
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const auto u32_value = ctx.OpBitcast(ctx.U32[1], value);
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const auto sign_bit_set =
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ctx.OpBitFieldUExtract(ctx.U32[1], u32_value, ctx.ConstU32(31u), ctx.ConstU32(1u));
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const auto result = ctx.OpSelect(
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ctx.F32[1], sign_bit_set,
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EmitBitCastF32U32(ctx, EmitImageAtomicUMin32(ctx, inst, handle, coords, u32_value)),
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EmitBitCastF32U32(ctx, EmitImageAtomicSMax32(ctx, inst, handle, coords, u32_value)));
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return result;
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}
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Id EmitImageAtomicFMin32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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if (ctx.profile.supports_image_fp32_atomic_min_max) {
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return ImageAtomicF32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicFMin);
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}
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const auto u32_value = ctx.OpBitcast(ctx.U32[1], value);
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const auto sign_bit_set =
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ctx.OpBitFieldUExtract(ctx.U32[1], u32_value, ctx.ConstU32(31u), ctx.ConstU32(1u));
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const auto result = ctx.OpSelect(
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ctx.F32[1], sign_bit_set,
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EmitBitCastF32U32(ctx, EmitImageAtomicUMax32(ctx, inst, handle, coords, u32_value)),
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EmitBitCastF32U32(ctx, EmitImageAtomicSMin32(ctx, inst, handle, coords, u32_value)));
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return result;
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}
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Id EmitImageAtomicInc32(EmitContext&, IR::Inst*, u32, Id, Id) {
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// TODO: This is not yet implemented
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitImageAtomicDec32(EmitContext&, IR::Inst*, u32, Id, Id) {
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// TODO: This is not yet implemented
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitImageAtomicAnd32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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return ImageAtomicU32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicAnd);
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}
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Id EmitImageAtomicOr32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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return ImageAtomicU32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicOr);
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}
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Id EmitImageAtomicXor32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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return ImageAtomicU32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicXor);
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}
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Id EmitImageAtomicExchange32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id value) {
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return ImageAtomicU32(ctx, inst, handle, coords, value, &Sirit::Module::OpAtomicExchange);
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}
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Id EmitDataAppend(EmitContext& ctx, u32 gds_addr, u32 binding) {
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const auto& buffer = ctx.buffers[binding];
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const auto [id, pointer_type] = buffer[EmitContext::PointerType::U32];
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const Id ptr = ctx.OpAccessChain(pointer_type, id, ctx.u32_zero_value, ctx.ConstU32(gds_addr));
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return ctx.OpAtomicIIncrement(ctx.U32[1], ptr, scope, semantics);
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}
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Id EmitDataConsume(EmitContext& ctx, u32 gds_addr, u32 binding) {
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const auto& buffer = ctx.buffers[binding];
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const auto [id, pointer_type] = buffer[EmitContext::PointerType::U32];
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const Id ptr = ctx.OpAccessChain(pointer_type, id, ctx.u32_zero_value, ctx.ConstU32(gds_addr));
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const auto [scope, semantics]{AtomicArgs(ctx)};
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return ctx.OpAtomicIDecrement(ctx.U32[1], ptr, scope, semantics);
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}
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} // namespace Shader::Backend::SPIRV
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