shader_ir/warp: Implement SHFL
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parent
393cc3ef2f
commit
0526bf1895
6 changed files with 182 additions and 9 deletions
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@ -13,6 +13,7 @@ namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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using Tegra::Shader::Pred;
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using Tegra::Shader::ShuffleOperation;
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using Tegra::Shader::VoteOperation;
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namespace {
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@ -44,6 +45,52 @@ u32 ShaderIR::DecodeWarp(NodeBlock& bb, u32 pc) {
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SetPredicate(bb, instr.vote.dest_pred, vote);
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break;
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}
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case OpCode::Id::SHFL: {
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Node mask = instr.shfl.is_mask_imm ? Immediate(static_cast<u32>(instr.shfl.mask_imm))
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: GetRegister(instr.gpr39);
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Node width = [&] {
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// Convert the obscure SHFL mask back into GL_NV_shader_thread_shuffle's width. This has
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// been done reversing Nvidia's math. It won't work on all cases due to SHFL having
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// different parameters that don't properly map to GLSL's interface, but it should work
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// for cases emitted by Nvidia's compiler.
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if (instr.shfl.operation == ShuffleOperation::Up) {
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return Operation(
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OperationCode::ILogicalShiftRight,
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Operation(OperationCode::IAdd, std::move(mask), Immediate(-0x2000)),
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Immediate(8));
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} else {
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return Operation(OperationCode::ILogicalShiftRight,
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Operation(OperationCode::IAdd, Immediate(0x201F),
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Operation(OperationCode::INegate, std::move(mask))),
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Immediate(8));
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}
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}();
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const auto [operation, in_range] = [instr]() -> std::pair<OperationCode, OperationCode> {
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switch (instr.shfl.operation) {
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case ShuffleOperation::Idx:
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return {OperationCode::ShuffleIndexed, OperationCode::InRangeShuffleIndexed};
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case ShuffleOperation::Up:
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return {OperationCode::ShuffleUp, OperationCode::InRangeShuffleUp};
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case ShuffleOperation::Down:
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return {OperationCode::ShuffleDown, OperationCode::InRangeShuffleDown};
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case ShuffleOperation::Bfly:
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return {OperationCode::ShuffleButterfly, OperationCode::InRangeShuffleButterfly};
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}
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UNREACHABLE_MSG("Invalid SHFL operation: {}",
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static_cast<u64>(instr.shfl.operation.Value()));
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return {};
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}();
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// Setting the predicate before the register is intentional to avoid overwriting.
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Node index = instr.shfl.is_index_imm ? Immediate(static_cast<u32>(instr.shfl.index_imm))
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: GetRegister(instr.gpr20);
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SetPredicate(bb, instr.shfl.pred48, Operation(in_range, index, width));
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SetRegister(
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bb, instr.gpr0,
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Operation(operation, GetRegister(instr.gpr8), std::move(index), std::move(width)));
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled warp instruction: {}", opcode->get().GetName());
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break;
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@ -181,6 +181,16 @@ enum class OperationCode {
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VoteAny, /// (bool) -> bool
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VoteEqual, /// (bool) -> bool
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ShuffleIndexed, /// (uint value, uint index, uint width) -> uint
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ShuffleUp, /// (uint value, uint index, uint width) -> uint
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ShuffleDown, /// (uint value, uint index, uint width) -> uint
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ShuffleButterfly, /// (uint value, uint index, uint width) -> uint
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InRangeShuffleIndexed, /// (uint index, uint width) -> bool
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InRangeShuffleUp, /// (uint index, uint width) -> bool
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InRangeShuffleDown, /// (uint index, uint width) -> bool
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InRangeShuffleButterfly, /// (uint index, uint width) -> bool
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Amount,
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};
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