arm: Throw out a lot of unnecessary code
This commit is contained in:
Lioncash
parent
3dfef1701c
commit
09a66860e2
6 changed files with 56 additions and 1536 deletions
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@ -15,8 +15,7 @@
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef _ARMDEFS_H_
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#define _ARMDEFS_H_
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#pragma once
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#include <cerrno>
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#include <csignal>
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@ -33,21 +32,6 @@
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#include "core/arm/skyeye_common/armmmu.h"
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#include "core/arm/skyeye_common/skyeye_defs.h"
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#if EMU_PLATFORM == PLATFORM_LINUX
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#include <sys/time.h>
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#include <unistd.h>
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#endif
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#if 0
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#if 0
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#define DIFF_STATE 1
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#define __FOLLOW_MODE__ 0
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#else
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#define DIFF_STATE 0
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#define __FOLLOW_MODE__ 1
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#endif
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#endif
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#ifndef FALSE
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#define FALSE 0
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#define TRUE 1
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@ -58,13 +42,6 @@
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#define LOWHIGH 1
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#define HIGHLOW 2
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//#define DBCT_TEST_SPEED
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#define DBCT_TEST_SPEED_SEC 10
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#define ARM_BYTE_TYPE 0
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#define ARM_HALFWORD_TYPE 1
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#define ARM_WORD_TYPE 2
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//the define of cachetype
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#define NONCACHE 0
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#define DATACACHE 1
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@ -73,18 +50,11 @@
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#define POS(i) ( (~(i)) >> 31 )
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#define NEG(i) ( (i) >> 31 )
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#ifndef __STDC__
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typedef char *VoidStar;
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#endif
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typedef u64 ARMdword; // must be 64 bits wide
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typedef u32 ARMword; // must be 32 bits wide
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typedef u16 ARMhword; // must be 16 bits wide
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typedef u8 ARMbyte; // must be 8 bits wide
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typedef struct ARMul_State ARMul_State;
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typedef struct ARMul_io ARMul_io;
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typedef struct ARMul_Energy ARMul_Energy;
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typedef unsigned ARMul_CPInits(ARMul_State* state);
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typedef unsigned ARMul_CPExits(ARMul_State* state);
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@ -98,65 +68,6 @@ typedef unsigned ARMul_CDPs(ARMul_State* state, unsigned type, ARMword instr);
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typedef unsigned ARMul_CPReads(ARMul_State* state, unsigned reg, ARMword* value);
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typedef unsigned ARMul_CPWrites(ARMul_State* state, unsigned reg, ARMword value);
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//added by ksh,2004-3-5
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struct ARMul_io
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{
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ARMword *instr; // to display the current interrupt state
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ARMword *net_flag; // to judge if network is enabled
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ARMword *net_int; // netcard interrupt
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//ywc,2004-04-01
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ARMword *ts_int;
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ARMword *ts_is_enable;
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ARMword *ts_addr_begin;
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ARMword *ts_addr_end;
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ARMword *ts_buffer;
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};
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/* added by ksh,2004-11-26,some energy profiling */
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struct ARMul_Energy
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{
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int energy_prof; /* <tktan> BUG200103282109 : for energy profiling */
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int enable_func_energy; /* <tktan> BUG200105181702 */
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char *func_energy;
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int func_display; /* <tktan> BUG200103311509 : for function call display */
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int func_disp_start; /* <tktan> BUG200104191428 : to start func profiling */
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char *start_func; /* <tktan> BUG200104191428 */
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FILE *outfile; /* <tktan> BUG200105201531 : direct console to file */
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long long tcycle, pcycle;
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float t_energy;
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void *cur_task; /* <tktan> BUG200103291737 */
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long long t_mem_cycle, t_idle_cycle, t_uart_cycle;
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long long p_mem_cycle, p_idle_cycle, p_uart_cycle;
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long long p_io_update_tcycle;
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/*record CCCR,to get current core frequency */
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ARMword cccr;
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};
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#if 0
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#define MAX_BANK 8
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#define MAX_STR 1024
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typedef struct mem_bank
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{
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ARMword (*read_byte) (ARMul_State* state, ARMword addr);
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void (*write_byte) (ARMul_State* state, ARMword addr, ARMword data);
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ARMword (*read_halfword) (ARMul_State* state, ARMword addr);
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void (*write_halfword) (ARMul_State* state, ARMword addr, ARMword data);
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ARMword (*read_word) (ARMul_State* state, ARMword addr);
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void (*write_word) (ARMul_State* state, ARMword addr, ARMword data);
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unsigned int addr, len;
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char filename[MAX_STR];
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unsigned type; //chy 2003-09-21: maybe io,ram,rom
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} mem_bank_t;
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typedef struct
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{
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int bank_num;
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int current_num; /*current num of bank */
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mem_bank_t mem_banks[MAX_BANK];
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} mem_config_t;
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#endif
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#define VFP_REG_NUM 64
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struct ARMul_State
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{
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@ -196,9 +107,8 @@ struct ARMul_State
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ARMdword Accumulator;
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ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */
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unsigned long long int icounter, debug_icounter, kernel_icounter;
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unsigned int shifter_carry_out;
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//ARMword translate_pc;
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unsigned long long int icounter, debug_icounter, kernel_icounter;
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unsigned int shifter_carry_out;
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/* add armv6 flags dyf:2010-08-09 */
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ARMword GEFlag, EFlag, AFlag, QFlag;
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@ -226,9 +136,6 @@ struct ARMul_State
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unsigned CanWatch; /* set by memory interface if its willing to suffer the
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overhead of checking for watchpoints on each memory
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access */
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unsigned int StopHandle;
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char *CommandLine; /* Command Line from ARMsd */
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ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */
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ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */
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@ -244,10 +151,6 @@ struct ARMul_State
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unsigned char *CPData[16]; /* Coprocessor data */
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unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */
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unsigned EventSet; /* the number of events in the queue */
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unsigned int Now; /* time to the nearest cycle */
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struct EventNode **EventPtr; /* the event list */
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unsigned Debug; /* show instructions as they are executed */
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unsigned NresetSig; /* reset the processor */
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unsigned NfiqSig;
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@ -300,17 +203,9 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
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ARMword Base; /* extra hand for base writeback */
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ARMword AbortAddr; /* to keep track of Prefetch aborts */
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const struct Dbg_HostosInterface *hostif;
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int verbose; /* non-zero means print various messages like the banner */
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int mmu_inited;
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//mem_state_t mem;
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/*remove io_state to skyeye_mach_*.c files */
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//io_state_t io;
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/* point to a interrupt pending register. now for skyeye-ne2k.c
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* later should move somewhere. e.g machine_config_t*/
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//chy: 2003-08-11, for different arm core type
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unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */
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@ -321,44 +216,17 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
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unsigned is_XScale; /* Are we emulating an XScale architecture ? */
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unsigned is_iWMMXt; /* Are we emulating an iWMMXt co-processor ? */
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unsigned is_ep9312; /* Are we emulating a Cirrus Maverick co-processor ? */
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//chy 2005-09-19
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unsigned is_pxa27x; /* Are we emulating a Intel PXA27x co-processor ? */
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//chy: seems only used in xscale's CP14
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unsigned int LastTime; /* Value of last call to ARMul_Time() */
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ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit 3 set */
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//added by ksh:for handle different machs io 2004-3-5
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ARMul_io mach_io;
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/*added by ksh,2004-11-26,some energy profiling*/
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ARMul_Energy energy;
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//teawater add for next_dis 2004.10.27-----------------------
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int disassemble;
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//teawater add for arm2x86 2005.02.15-------------------------------------------
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u32 trap;
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u32 tea_break_addr;
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u32 tea_break_ok;
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int tea_pc;
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//teawater add for arm2x86 2005.07.05-------------------------------------------
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//arm_arm A2-18
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int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model
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//teawater change for return if running tb dirty 2005.07.09---------------------
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void *tb_now;
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//teawater add for record reg value to ./reg.txt 2005.07.10---------------------
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FILE *tea_reg_fd;
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int abort_model; //0 Base Restored Abort Model, 1 the Early Abort Model, 2 Base Updated Abort Model
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/*added by ksh in 2005-10-1*/
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cpu_config_t *cpu;
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//mem_config_t *mem_bank;
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/* added LPC remap function */
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int vector_remap_flag;
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@ -367,23 +235,12 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
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u32 step;
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u32 cycle;
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int stop_simulator;
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conf_object_t *dyncom_cpu;
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//teawater add DBCT_TEST_SPEED 2005.10.04---------------------------------------
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#ifdef DBCT_TEST_SPEED
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uint64_t instr_count;
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#endif //DBCT_TEST_SPEED
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// FILE * state_log;
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//diff log
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//#if DIFF_STATE
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FILE * state_log;
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//#endif
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/* monitored memory for exclusice access */
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ARMword exclusive_tag_array[128];
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/* 1 means exclusive access and 0 means open access */
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ARMword exclusive_access_state;
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memory_space_intf space;
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u32 CurrInstr;
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u32 last_pc; /* the last pc executed */
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u32 last_instr; /* the last inst executed */
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@ -392,7 +249,6 @@ So, if lateabtSig=1, then it means Late Abort Model(Base Updated Abort Model)
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u32 WritePc[17];
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u32 CurrWrite;
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};
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#define DIFF_WRITE 0
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typedef ARMul_State arm_core_t;
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@ -519,13 +375,6 @@ extern void ARMul_Reset(ARMul_State* state);
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extern ARMul_State *ARMul_NewState(ARMul_State* state);
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extern ARMword ARMul_DoProg(ARMul_State* state);
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extern ARMword ARMul_DoInstr(ARMul_State* state);
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/***************************************************************************\
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* Definitons of things for event handling *
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\***************************************************************************/
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extern void ARMul_ScheduleEvent(ARMul_State* state, unsigned int delay, unsigned(*func) ());
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extern void ARMul_EnvokeEvent(ARMul_State* state);
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extern unsigned int ARMul_Time(ARMul_State* state);
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/***************************************************************************\
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* Useful support routines *
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@ -724,56 +573,12 @@ enum ConditionCode {
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#define IFFLAGS state->IFFlags
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#endif //VFLAG
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#define SKYEYE_OUTREGS(fd) { fprintf ((fd), "R %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,C %x,S %x,%x,%x,%x,%x,%x,%x,M %x,B %x,E %x,I %x,P %x,T %x,L %x,D %x,",\
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state->Reg[0],state->Reg[1],state->Reg[2],state->Reg[3], \
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state->Reg[4],state->Reg[5],state->Reg[6],state->Reg[7], \
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state->Reg[8],state->Reg[9],state->Reg[10],state->Reg[11], \
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state->Reg[12],state->Reg[13],state->Reg[14],state->Reg[15], \
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state->Cpsr, state->Spsr[0], state->Spsr[1], state->Spsr[2],\
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state->Spsr[3],state->Spsr[4], state->Spsr[5], state->Spsr[6],\
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state->Mode,state->Bank,state->ErrorCode,state->instr,state->pc,\
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state->temp,state->loaded,state->decoded);}
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#define SKYEYE_OUTMOREREGS(fd) { fprintf ((fd),"\
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RUs %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\
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RF %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\
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RI %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\
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RS %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\
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RA %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,\
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RUn %x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x,%x\n",\
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state->RegBank[0][0],state->RegBank[0][1],state->RegBank[0][2],state->RegBank[0][3], \
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state->RegBank[0][4],state->RegBank[0][5],state->RegBank[0][6],state->RegBank[0][7], \
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state->RegBank[0][8],state->RegBank[0][9],state->RegBank[0][10],state->RegBank[0][11], \
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state->RegBank[0][12],state->RegBank[0][13],state->RegBank[0][14],state->RegBank[0][15], \
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state->RegBank[1][0],state->RegBank[1][1],state->RegBank[1][2],state->RegBank[1][3], \
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state->RegBank[1][4],state->RegBank[1][5],state->RegBank[1][6],state->RegBank[1][7], \
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state->RegBank[1][8],state->RegBank[1][9],state->RegBank[1][10],state->RegBank[1][11], \
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state->RegBank[1][12],state->RegBank[1][13],state->RegBank[1][14],state->RegBank[1][15], \
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state->RegBank[2][0],state->RegBank[2][1],state->RegBank[2][2],state->RegBank[2][3], \
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state->RegBank[2][4],state->RegBank[2][5],state->RegBank[2][6],state->RegBank[2][7], \
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state->RegBank[2][8],state->RegBank[2][9],state->RegBank[2][10],state->RegBank[2][11], \
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state->RegBank[2][12],state->RegBank[2][13],state->RegBank[2][14],state->RegBank[2][15], \
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state->RegBank[3][0],state->RegBank[3][1],state->RegBank[3][2],state->RegBank[3][3], \
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state->RegBank[3][4],state->RegBank[3][5],state->RegBank[3][6],state->RegBank[3][7], \
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state->RegBank[3][8],state->RegBank[3][9],state->RegBank[3][10],state->RegBank[3][11], \
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state->RegBank[3][12],state->RegBank[3][13],state->RegBank[3][14],state->RegBank[3][15], \
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state->RegBank[4][0],state->RegBank[4][1],state->RegBank[4][2],state->RegBank[4][3], \
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state->RegBank[4][4],state->RegBank[4][5],state->RegBank[4][6],state->RegBank[4][7], \
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state->RegBank[4][8],state->RegBank[4][9],state->RegBank[4][10],state->RegBank[4][11], \
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state->RegBank[4][12],state->RegBank[4][13],state->RegBank[4][14],state->RegBank[4][15], \
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state->RegBank[5][0],state->RegBank[5][1],state->RegBank[5][2],state->RegBank[5][3], \
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state->RegBank[5][4],state->RegBank[5][5],state->RegBank[5][6],state->RegBank[5][7], \
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state->RegBank[5][8],state->RegBank[5][9],state->RegBank[5][10],state->RegBank[5][11], \
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state->RegBank[5][12],state->RegBank[5][13],state->RegBank[5][14],state->RegBank[5][15] \
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);}
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extern bool AddOverflow(ARMword, ARMword, ARMword);
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extern bool SubOverflow(ARMword, ARMword, ARMword);
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extern void ARMul_UndefInstr(ARMul_State*, ARMword);
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extern void ARMul_FixCPSR(ARMul_State*, ARMword, ARMword);
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extern void ARMul_FixSPSR(ARMul_State*, ARMword, ARMword);
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extern void ARMul_ConsolePrint(ARMul_State*, const char*, ...);
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extern void ARMul_SelectProcessor(ARMul_State*, unsigned);
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extern u32 AddWithCarry(u32, u32, u32, bool*, bool*);
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@ -791,8 +596,3 @@ extern u16 ARMul_UnsignedSaturatedSub16(u16, u16);
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extern u8 ARMul_UnsignedAbsoluteDifference(u8, u8);
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extern u32 ARMul_SignedSatQ(s32, u8, bool*);
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extern u32 ARMul_UnsignedSatQ(s32, u8, bool*);
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#define DIFF_LOG 0
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#define SAVE_LOG 0
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#endif /* _ARMDEFS_H_ */
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@ -575,8 +575,6 @@ extern ARMword ARMul_GetPC (ARMul_State *);
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extern ARMword ARMul_GetNextPC (ARMul_State *);
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extern ARMword ARMul_GetR15 (ARMul_State *);
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extern ARMword ARMul_GetCPSR (ARMul_State *);
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extern void ARMul_EnvokeEvent (ARMul_State *);
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extern unsigned int ARMul_Time (ARMul_State *);
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extern void ARMul_NegZero (ARMul_State *, ARMword);
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extern void ARMul_SetPC (ARMul_State *, ARMword);
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extern void ARMul_SetR15 (ARMul_State *, ARMword);
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@ -603,8 +601,7 @@ extern void ARMul_AddCarry (ARMul_State *, ARMword, ARMword, ARMword);
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extern tdstate ARMul_ThumbDecode (ARMul_State *, ARMword, ARMword, ARMword *);
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extern ARMword ARMul_GetReg (ARMul_State *, unsigned, unsigned);
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extern void ARMul_SetReg (ARMul_State *, unsigned, unsigned, ARMword);
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extern void ARMul_ScheduleEvent (ARMul_State *, unsigned int,
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unsigned (*)(ARMul_State *));
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/* Coprocessor support functions. */
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extern unsigned ARMul_CoProInit (ARMul_State *);
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extern void ARMul_CoProExit (ARMul_State *);
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@ -1,5 +1,4 @@
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#ifndef CORE_ARM_SKYEYE_DEFS_H_
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#define CORE_ARM_SKYEYE_DEFS_H_
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#pragma once
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#include "common/common.h"
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@ -8,21 +7,15 @@
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typedef struct
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{
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const char *cpu_arch_name; /*cpu architecture version name.e.g. armv4t */
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const char *cpu_name; /*cpu name. e.g. arm7tdmi or arm720t */
|
||||
u32 cpu_val; /*CPU value; also call MMU ID or processor id;see
|
||||
ARM Architecture Reference Manual B2-6 */
|
||||
u32 cpu_mask; /*cpu_val's mask. */
|
||||
u32 cachetype; /*this cpu has what kind of cache */
|
||||
const char *cpu_arch_name; /* CPU architecture version name.e.g. armv4t */
|
||||
const char *cpu_name; /* CPU name. e.g. arm7tdmi or arm720t */
|
||||
u32 cpu_val; /*CPU value; also call MMU ID or processor id;see
|
||||
ARM Architecture Reference Manual B2-6 */
|
||||
u32 cpu_mask; /* cpu_val's mask. */
|
||||
u32 cachetype; /* this CPU has what kind of cache */
|
||||
} cpu_config_t;
|
||||
|
||||
typedef struct conf_object_s{
|
||||
char* objname;
|
||||
void* obj;
|
||||
char* class_name;
|
||||
}conf_object_t;
|
||||
|
||||
typedef enum{
|
||||
typedef enum {
|
||||
/* No exception */
|
||||
No_exp = 0,
|
||||
/* Memory allocation exception */
|
||||
|
|
@ -44,70 +37,21 @@ typedef enum{
|
|||
|
||||
/* Unknown exception */
|
||||
Unknown_exp
|
||||
}exception_t;
|
||||
} exception_t;
|
||||
|
||||
typedef enum {
|
||||
Align = 0,
|
||||
UnAlign
|
||||
}align_t;
|
||||
} align_t;
|
||||
|
||||
typedef enum {
|
||||
Little_endian = 0,
|
||||
Big_endian
|
||||
}endian_t;
|
||||
//typedef int exception_t;
|
||||
} endian_t;
|
||||
|
||||
typedef enum{
|
||||
typedef enum {
|
||||
Phys_addr = 0,
|
||||
Virt_addr
|
||||
}addr_type_t;
|
||||
|
||||
typedef exception_t(*read_byte_t)(conf_object_t* target, u32 addr, void *buf, size_t count);
|
||||
typedef exception_t(*write_byte_t)(conf_object_t* target, u32 addr, const void *buf, size_t count);
|
||||
|
||||
typedef struct memory_space{
|
||||
conf_object_t* conf_obj;
|
||||
read_byte_t read;
|
||||
write_byte_t write;
|
||||
}memory_space_intf;
|
||||
|
||||
|
||||
/*
|
||||
* a running instance for a specific archteciture.
|
||||
*/
|
||||
typedef struct generic_arch_s
|
||||
{
|
||||
char* arch_name;
|
||||
void (*init) (void);
|
||||
void (*reset) (void);
|
||||
void (*step_once) (void);
|
||||
void (*set_pc)(u32 addr);
|
||||
u32 (*get_pc)(void);
|
||||
u32 (*get_step)(void);
|
||||
//chy 2004-04-15
|
||||
//int (*ICE_write_byte) (u32 addr, uint8_t v);
|
||||
//int (*ICE_read_byte)(u32 addr, uint8_t *pv);
|
||||
u32 (*get_regval_by_id)(int id);
|
||||
u32 (*get_regnum)(void);
|
||||
char* (*get_regname_by_id)(int id);
|
||||
exception_t (*set_regval_by_id)(int id, u32 value);
|
||||
/*
|
||||
* read a data by virtual address.
|
||||
*/
|
||||
exception_t (*mmu_read)(short size, u32 addr, u32 * value);
|
||||
/*
|
||||
* write a data by a virtual address.
|
||||
*/
|
||||
exception_t (*mmu_write)(short size, u32 addr, u32 value);
|
||||
/**
|
||||
* get a signal from external
|
||||
*/
|
||||
//exception_t (*signal)(interrupt_signal_t* signal);
|
||||
|
||||
endian_t endianess;
|
||||
align_t alignment;
|
||||
} generic_arch_t;
|
||||
} addr_type_t;
|
||||
|
||||
typedef u32 addr_t;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue