SMMU: Initial adaptation to video_core.
This commit is contained in:
Fernando Sahmkow
Liam
parent
c85d7ccd79
commit
0a2536a0df
79 changed files with 1262 additions and 1263 deletions
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@ -2,6 +2,8 @@
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// SPDX-FileCopyrightText: 2022 Skyline Team and Contributors
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// SPDX-License-Identifier: GPL-3.0-or-later
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#include <functional>
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "common/logging/log.h"
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@ -18,6 +20,7 @@ NvMap::Handle::Handle(u64 size_, Id id_)
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}
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NvResult NvMap::Handle::Alloc(Flags pFlags, u32 pAlign, u8 pKind, u64 pAddress) {
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std::scoped_lock lock(mutex);
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// Handles cannot be allocated twice
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if (allocated) {
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return NvResult::AccessDenied;
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@ -78,11 +81,9 @@ void NvMap::UnmapHandle(Handle& handle_description) {
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// Free and unmap the handle from the SMMU
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auto& smmu = host1x.MemoryManager();
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smmu.Unmap(static_cast<DAddr>(handle_description.pin_virt_address),
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handle_description.aligned_size);
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smmu.Free(handle_description.pin_virt_address,
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static_cast<size_t>(handle_description.aligned_size));
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handle_description.pin_virt_address = 0;
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smmu.Unmap(handle_description.d_address, handle_description.aligned_size);
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smmu.Free(handle_description.d_address, static_cast<size_t>(handle_description.aligned_size));
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handle_description.d_address = 0;
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}
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bool NvMap::TryRemoveHandle(const Handle& handle_description) {
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@ -123,41 +124,16 @@ std::shared_ptr<NvMap::Handle> NvMap::GetHandle(Handle::Id handle) {
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}
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}
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VAddr NvMap::GetHandleAddress(Handle::Id handle) {
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DAddr NvMap::GetHandleAddress(Handle::Id handle) {
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std::scoped_lock lock(handles_lock);
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try {
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return handles.at(handle)->address;
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return handles.at(handle)->d_address;
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} catch (std::out_of_range&) {
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return 0;
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}
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}
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NvResult NvMap::AllocateHandle(Handle::Id handle, Handle::Flags pFlags, u32 pAlign, u8 pKind, u64 pAddress, size_t session_id) {
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auto handle_description{GetHandle(handle)};
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if (!handle_description) [[unlikely]] {
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return NvResult::BadParameter;
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}
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if (handle_description->allocated) [[unlikely]] {
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return NvResult::InsufficientMemory;
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}
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std::scoped_lock lock(handle_description->mutex);
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NvResult result = handle_description->Alloc(pFlags, pAlign, pKind, pAddress);
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if (result != NvResult::Success) {
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return result;
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}
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auto& smmu = host1x.MemoryManager();
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size_t total_size = static_cast<size_t>(handle_description->aligned_size);
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handle_description->d_address = smmu.Allocate(total_size);
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if (handle_description->d_address == 0) {
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return NvResult::InsufficientMemory;
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}
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smmu.Map(handle_description->d_address, handle_description->address, total_size, session_id);
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return NvResult::Success;
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}
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u32 NvMap::PinHandle(NvMap::Handle::Id handle, size_t session_id) {
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DAddr NvMap::PinHandle(NvMap::Handle::Id handle, size_t session_id, bool low_area_pin) {
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auto handle_description{GetHandle(handle)};
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if (!handle_description) [[unlikely]] {
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return 0;
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@ -176,35 +152,38 @@ u32 NvMap::PinHandle(NvMap::Handle::Id handle, size_t session_id) {
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handle_description->unmap_queue_entry.reset();
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handle_description->pins++;
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return handle_description->pin_virt_address;
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return handle_description->d_address;
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}
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}
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using namespace std::placeholders;
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// If not then allocate some space and map it
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DAddr address{};
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auto& smmu = host1x.MemoryManager();
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while ((address = smmu.AllocatePinned(
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static_cast<size_t>(handle_description->aligned_size))) == 0) {
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auto allocate = std::bind(&Tegra::MaxwellDeviceMemoryManager::Allocate, &smmu, _1);
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//: std::bind(&Tegra::MaxwellDeviceMemoryManager::Allocate, &smmu, _1);
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while ((address = allocate(static_cast<size_t>(handle_description->aligned_size))) == 0) {
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// Free handles until the allocation succeeds
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std::scoped_lock queueLock(unmap_queue_lock);
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if (auto freeHandleDesc{unmap_queue.front()}) {
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// Handles in the unmap queue are guaranteed not to be pinned so don't bother
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// checking if they are before unmapping
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std::scoped_lock freeLock(freeHandleDesc->mutex);
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if (handle_description->pin_virt_address)
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if (handle_description->d_address)
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UnmapHandle(*freeHandleDesc);
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} else {
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LOG_CRITICAL(Service_NVDRV, "Ran out of SMMU address space!");
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}
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}
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handle_description->d_address = address;
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smmu.Map(address, handle_description->address, handle_description->aligned_size,
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session_id);
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handle_description->pin_virt_address = static_cast<u32>(address);
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}
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handle_description->pins++;
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return handle_description->pin_virt_address;
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return handle_description->d_address;
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}
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void NvMap::UnpinHandle(Handle::Id handle) {
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@ -255,15 +234,10 @@ std::optional<NvMap::FreeInfo> NvMap::FreeHandle(Handle::Id handle, bool interna
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LOG_WARNING(Service_NVDRV, "User duplicate count imbalance detected!");
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} else if (handle_description->dupes == 0) {
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// Force unmap the handle
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if (handle_description->pin_virt_address) {
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if (handle_description->d_address) {
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std::scoped_lock queueLock(unmap_queue_lock);
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UnmapHandle(*handle_description);
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}
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if (handle_description->allocated) {
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auto& smmu = host1x.MemoryManager();
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smmu.Free(handle_description->d_address, handle_description->aligned_size);
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smmu.Unmap(handle_description->d_address, handle_description->aligned_size);
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}
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handle_description->pins = 0;
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}
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@ -48,7 +48,7 @@ public:
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using Id = u32;
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Id id; //!< A globally unique identifier for this handle
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s32 pins{};
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s64 pins{};
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u32 pin_virt_address{};
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std::optional<typename std::list<std::shared_ptr<Handle>>::iterator> unmap_queue_entry{};
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@ -63,15 +63,14 @@ public:
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VAddr address{}; //!< The memory location in the guest's AS that this handle corresponds to,
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//!< this can also be in the nvdrv tmem
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DAddr d_address{}; //!< The memory location in the device's AS that this handle corresponds to,
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//!< this can also be in the nvdrv tmem
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bool is_shared_mem_mapped{}; //!< If this nvmap has been mapped with the MapSharedMem IPC
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//!< call
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u8 kind{}; //!< Used for memory compression
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bool allocated{}; //!< If the handle has been allocated with `Alloc`
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u64 dma_map_addr{}; //! remove me after implementing pinning.
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DAddr d_address{}; //!< The memory location in the device's AS that this handle corresponds to,
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//!< this can also be in the nvdrv tmem
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Handle(u64 size, Id id);
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@ -119,7 +118,7 @@ public:
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std::shared_ptr<Handle> GetHandle(Handle::Id handle);
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VAddr GetHandleAddress(Handle::Id handle);
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DAddr GetHandleAddress(Handle::Id handle);
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/**
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* @brief Maps a handle into the SMMU address space
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@ -127,15 +126,7 @@ public:
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* number of calls to `UnpinHandle`
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* @return The SMMU virtual address that the handle has been mapped to
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*/
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u32 PinHandle(Handle::Id handle, size_t session_id);
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/**
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* @brief Maps a handle into the SMMU address space
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* @note This operation is refcounted, the number of calls to this must eventually match the
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* number of calls to `UnpinHandle`
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* @return The SMMU virtual address that the handle has been mapped to
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*/
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NvResult AllocateHandle(Handle::Id handle, Handle::Flags pFlags, u32 pAlign, u8 pKind, u64 pAddress, size_t session_id);
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DAddr PinHandle(Handle::Id handle, size_t session_id, bool low_area_pin);
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/**
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* @brief When this has been called an equal number of times to `PinHandle` for the supplied
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@ -42,7 +42,7 @@ void nvdisp_disp0::flip(u32 buffer_handle, u32 offset, android::PixelFormat form
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u32 height, u32 stride, android::BufferTransformFlags transform,
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const Common::Rectangle<int>& crop_rect,
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std::array<Service::Nvidia::NvFence, 4>& fences, u32 num_fences) {
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const VAddr addr = nvmap.GetHandleAddress(buffer_handle);
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const DAddr addr = nvmap.GetHandleAddress(buffer_handle);
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LOG_TRACE(Service,
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"Drawing from address {:X} offset {:08X} Width {} Height {} Stride {} Format {}",
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addr, offset, width, height, stride, format);
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@ -40,15 +40,15 @@ NvResult nvhost_as_gpu::Ioctl1(DeviceFD fd, Ioctl command, std::span<const u8> i
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case 0x3:
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return WrapFixed(this, &nvhost_as_gpu::FreeSpace, input, output);
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case 0x5:
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return WrapFixed(this, &nvhost_as_gpu::UnmapBuffer, input, output);
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return WrapFixed(this, &nvhost_as_gpu::UnmapBuffer, input, output, fd);
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case 0x6:
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return WrapFixed(this, &nvhost_as_gpu::MapBufferEx, input, output);
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return WrapFixed(this, &nvhost_as_gpu::MapBufferEx, input, output, fd);
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case 0x8:
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return WrapFixed(this, &nvhost_as_gpu::GetVARegions1, input, output);
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case 0x9:
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return WrapFixed(this, &nvhost_as_gpu::AllocAsEx, input, output);
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case 0x14:
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return WrapVariable(this, &nvhost_as_gpu::Remap, input, output);
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return WrapVariable(this, &nvhost_as_gpu::Remap, input, output, fd);
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default:
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break;
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}
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@ -86,8 +86,15 @@ NvResult nvhost_as_gpu::Ioctl3(DeviceFD fd, Ioctl command, std::span<const u8> i
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return NvResult::NotImplemented;
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}
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void nvhost_as_gpu::OnOpen(size_t session_id, DeviceFD fd) {}
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void nvhost_as_gpu::OnClose(DeviceFD fd) {}
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void nvhost_as_gpu::OnOpen(size_t session_id, DeviceFD fd) {
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sessions[fd] = session_id;
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}
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void nvhost_as_gpu::OnClose(DeviceFD fd) {
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auto it = sessions.find(fd);
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if (it != sessions.end()) {
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sessions.erase(it);
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}
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}
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NvResult nvhost_as_gpu::AllocAsEx(IoctlAllocAsEx& params) {
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LOG_DEBUG(Service_NVDRV, "called, big_page_size=0x{:X}", params.big_page_size);
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@ -206,6 +213,8 @@ void nvhost_as_gpu::FreeMappingLocked(u64 offset) {
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static_cast<u32>(aligned_size >> page_size_bits));
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}
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nvmap.UnpinHandle(mapping->handle);
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// Sparse mappings shouldn't be fully unmapped, just returned to their sparse state
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// Only FreeSpace can unmap them fully
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if (mapping->sparse_alloc) {
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@ -259,7 +268,7 @@ NvResult nvhost_as_gpu::FreeSpace(IoctlFreeSpace& params) {
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return NvResult::Success;
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}
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NvResult nvhost_as_gpu::Remap(std::span<IoctlRemapEntry> entries) {
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NvResult nvhost_as_gpu::Remap(std::span<IoctlRemapEntry> entries, DeviceFD fd) {
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LOG_DEBUG(Service_NVDRV, "called, num_entries=0x{:X}", entries.size());
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if (!vm.initialised) {
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@ -293,19 +302,19 @@ NvResult nvhost_as_gpu::Remap(std::span<IoctlRemapEntry> entries) {
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return NvResult::BadValue;
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}
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VAddr cpu_address{static_cast<VAddr>(
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handle->address +
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(static_cast<u64>(entry.handle_offset_big_pages) << vm.big_page_size_bits))};
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DAddr base = nvmap.PinHandle(entry.handle, sessions[fd], false);
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DAddr device_address{static_cast<DAddr>(
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base + (static_cast<u64>(entry.handle_offset_big_pages) << vm.big_page_size_bits))};
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gmmu->Map(virtual_address, cpu_address, size, static_cast<Tegra::PTEKind>(entry.kind),
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use_big_pages);
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gmmu->Map(virtual_address, device_address, size,
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static_cast<Tegra::PTEKind>(entry.kind), use_big_pages);
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}
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}
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return NvResult::Success;
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}
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NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params) {
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NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params, DeviceFD fd) {
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LOG_DEBUG(Service_NVDRV,
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"called, flags={:X}, nvmap_handle={:X}, buffer_offset={}, mapping_size={}"
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", offset={}",
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@ -331,9 +340,9 @@ NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params) {
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}
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u64 gpu_address{static_cast<u64>(params.offset + params.buffer_offset)};
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VAddr cpu_address{mapping->ptr + params.buffer_offset};
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VAddr device_address{mapping->ptr + params.buffer_offset};
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gmmu->Map(gpu_address, cpu_address, params.mapping_size,
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gmmu->Map(gpu_address, device_address, params.mapping_size,
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static_cast<Tegra::PTEKind>(params.kind), mapping->big_page);
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return NvResult::Success;
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@ -349,7 +358,8 @@ NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params) {
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return NvResult::BadValue;
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}
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VAddr cpu_address{static_cast<VAddr>(handle->address + params.buffer_offset)};
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DAddr device_address{static_cast<DAddr>(nvmap.PinHandle(params.handle, sessions[fd], false) +
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params.buffer_offset)};
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u64 size{params.mapping_size ? params.mapping_size : handle->orig_size};
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bool big_page{[&]() {
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@ -373,15 +383,14 @@ NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params) {
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}
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const bool use_big_pages = alloc->second.big_pages && big_page;
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gmmu->Map(params.offset, cpu_address, size, static_cast<Tegra::PTEKind>(params.kind),
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gmmu->Map(params.offset, device_address, size, static_cast<Tegra::PTEKind>(params.kind),
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use_big_pages);
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auto mapping{std::make_shared<Mapping>(cpu_address, params.offset, size, true,
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use_big_pages, alloc->second.sparse)};
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auto mapping{std::make_shared<Mapping>(params.handle, device_address, params.offset, size,
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true, use_big_pages, alloc->second.sparse)};
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alloc->second.mappings.push_back(mapping);
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mapping_map[params.offset] = mapping;
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} else {
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auto& allocator{big_page ? *vm.big_page_allocator : *vm.small_page_allocator};
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u32 page_size{big_page ? vm.big_page_size : VM::YUZU_PAGESIZE};
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u32 page_size_bits{big_page ? vm.big_page_size_bits : VM::PAGE_SIZE_BITS};
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@ -394,18 +403,18 @@ NvResult nvhost_as_gpu::MapBufferEx(IoctlMapBufferEx& params) {
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return NvResult::InsufficientMemory;
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}
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gmmu->Map(params.offset, cpu_address, Common::AlignUp(size, page_size),
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gmmu->Map(params.offset, device_address, Common::AlignUp(size, page_size),
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static_cast<Tegra::PTEKind>(params.kind), big_page);
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auto mapping{
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std::make_shared<Mapping>(cpu_address, params.offset, size, false, big_page, false)};
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auto mapping{std::make_shared<Mapping>(params.handle, device_address, params.offset, size,
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false, big_page, false)};
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mapping_map[params.offset] = mapping;
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}
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return NvResult::Success;
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}
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NvResult nvhost_as_gpu::UnmapBuffer(IoctlUnmapBuffer& params) {
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NvResult nvhost_as_gpu::UnmapBuffer(IoctlUnmapBuffer& params, DeviceFD fd) {
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LOG_DEBUG(Service_NVDRV, "called, offset=0x{:X}", params.offset);
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std::scoped_lock lock(mutex);
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@ -433,6 +442,8 @@ NvResult nvhost_as_gpu::UnmapBuffer(IoctlUnmapBuffer& params) {
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gmmu->Unmap(params.offset, mapping->size);
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}
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nvmap.UnpinHandle(mapping->handle);
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mapping_map.erase(params.offset);
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} catch (const std::out_of_range&) {
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LOG_WARNING(Service_NVDRV, "Couldn't find region to unmap at 0x{:X}", params.offset);
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@ -141,9 +141,9 @@ private:
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NvResult AllocAsEx(IoctlAllocAsEx& params);
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NvResult AllocateSpace(IoctlAllocSpace& params);
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NvResult Remap(std::span<IoctlRemapEntry> params);
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NvResult MapBufferEx(IoctlMapBufferEx& params);
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NvResult UnmapBuffer(IoctlUnmapBuffer& params);
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NvResult Remap(std::span<IoctlRemapEntry> params, DeviceFD fd);
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NvResult MapBufferEx(IoctlMapBufferEx& params, DeviceFD fd);
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NvResult UnmapBuffer(IoctlUnmapBuffer& params, DeviceFD fd);
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NvResult FreeSpace(IoctlFreeSpace& params);
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NvResult BindChannel(IoctlBindChannel& params);
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@ -159,16 +159,18 @@ private:
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NvCore::NvMap& nvmap;
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struct Mapping {
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VAddr ptr;
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NvCore::NvMap::Handle::Id handle;
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DAddr ptr;
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u64 offset;
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u64 size;
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bool fixed;
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bool big_page; // Only valid if fixed == false
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bool sparse_alloc;
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Mapping(VAddr ptr_, u64 offset_, u64 size_, bool fixed_, bool big_page_, bool sparse_alloc_)
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: ptr(ptr_), offset(offset_), size(size_), fixed(fixed_), big_page(big_page_),
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sparse_alloc(sparse_alloc_) {}
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Mapping(NvCore::NvMap::Handle::Id handle_, DAddr ptr_, u64 offset_, u64 size_, bool fixed_,
|
||||
bool big_page_, bool sparse_alloc_)
|
||||
: handle(handle_), ptr(ptr_), offset(offset_), size(size_), fixed(fixed_),
|
||||
big_page(big_page_), sparse_alloc(sparse_alloc_) {}
|
||||
};
|
||||
|
||||
struct Allocation {
|
||||
|
|
@ -212,9 +214,7 @@ private:
|
|||
bool initialised{};
|
||||
} vm;
|
||||
std::shared_ptr<Tegra::MemoryManager> gmmu;
|
||||
|
||||
// s32 channel{};
|
||||
// u32 big_page_size{VM::DEFAULT_BIG_PAGE_SIZE};
|
||||
std::unordered_map<DeviceFD, size_t> sessions;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
|
|
|||
|
|
@ -95,6 +95,9 @@ NvResult nvhost_nvdec_common::Submit(IoctlSubmit& params, std::span<u8> data, De
|
|||
offset += SliceVectors(data, fence_thresholds, params.fence_count, offset);
|
||||
|
||||
auto& gpu = system.GPU();
|
||||
//auto& device_memory = system.Host1x().MemoryManager();
|
||||
auto* session = core.GetSession(sessions[fd]);
|
||||
|
||||
if (gpu.UseNvdec()) {
|
||||
for (std::size_t i = 0; i < syncpt_increments.size(); i++) {
|
||||
const SyncptIncr& syncpt_incr = syncpt_increments[i];
|
||||
|
|
@ -106,7 +109,7 @@ NvResult nvhost_nvdec_common::Submit(IoctlSubmit& params, std::span<u8> data, De
|
|||
const auto object = nvmap.GetHandle(cmd_buffer.memory_id);
|
||||
ASSERT_OR_EXECUTE(object, return NvResult::InvalidState;);
|
||||
Tegra::ChCommandHeaderList cmdlist(cmd_buffer.word_count);
|
||||
system.ApplicationMemory().ReadBlock(object->address + cmd_buffer.offset, cmdlist.data(),
|
||||
session->process->GetMemory().ReadBlock(object->address + cmd_buffer.offset, cmdlist.data(),
|
||||
cmdlist.size() * sizeof(u32));
|
||||
gpu.PushCommandBuffer(core.Host1xDeviceFile().fd_to_id[fd], cmdlist);
|
||||
}
|
||||
|
|
@ -136,7 +139,8 @@ NvResult nvhost_nvdec_common::GetWaitbase(IoctlGetWaitbase& params) {
|
|||
NvResult nvhost_nvdec_common::MapBuffer(IoctlMapBuffer& params, std::span<MapBufferEntry> entries, DeviceFD fd) {
|
||||
const size_t num_entries = std::min(params.num_entries, static_cast<u32>(entries.size()));
|
||||
for (size_t i = 0; i < num_entries; i++) {
|
||||
entries[i].map_address = nvmap.PinHandle(entries[i].map_handle, sessions[fd]);
|
||||
DAddr pin_address = nvmap.PinHandle(entries[i].map_handle, sessions[fd], true);
|
||||
entries[i].map_address = static_cast<u32>(pin_address);
|
||||
}
|
||||
|
||||
return NvResult::Success;
|
||||
|
|
|
|||
|
|
@ -123,8 +123,8 @@ NvResult nvmap::IocAlloc(IocAllocParams& params, DeviceFD fd) {
|
|||
return NvResult::InsufficientMemory;
|
||||
}
|
||||
|
||||
const auto result = file.AllocateHandle(params.handle, params.flags, params.align, params.kind,
|
||||
params.address, sessions[fd]);
|
||||
const auto result =
|
||||
handle_description->Alloc(params.flags, params.align, params.kind, params.address);
|
||||
if (result != NvResult::Success) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Object failed to allocate, handle={:08X}", params.handle);
|
||||
return result;
|
||||
|
|
|
|||
|
|
@ -13,8 +13,6 @@
|
|||
#include "core/hle/service/nvdrv/nvdrv.h"
|
||||
#include "core/hle/service/nvdrv/nvdrv_interface.h"
|
||||
|
||||
#pragma optimize("", off)
|
||||
|
||||
namespace Service::Nvidia {
|
||||
|
||||
void NVDRV::Open(HLERequestContext& ctx) {
|
||||
|
|
@ -173,8 +171,8 @@ void NVDRV::Initialize(HLERequestContext& ctx) {
|
|||
[[maybe_unused]] const auto transfer_memory_size = rp.Pop<u32>();
|
||||
|
||||
auto& container = nvdrv->GetContainer();
|
||||
auto process = ctx.GetObjectFromHandle(process_handle);
|
||||
session_id = container.OpenSession(process->DynamicCast<Kernel::KProcess*>());
|
||||
auto process = ctx.GetObjectFromHandle<Kernel::KProcess>(process_handle);
|
||||
session_id = container.OpenSession(process.GetPointerUnsafe());
|
||||
|
||||
is_initialized = true;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue