shader/bfi: Implement register-constant buffer variant
It's the same as the variant that was implemented, but it takes the operands from another source.
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2 changed files with 7 additions and 2 deletions
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@ -17,10 +17,13 @@ u32 ShaderIR::DecodeBfi(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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const auto [base, packed_shift] = [&]() -> std::tuple<Node, Node> {
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const auto [packed_shift, base] = [&]() -> std::pair<Node, Node> {
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switch (opcode->get().GetId()) {
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case OpCode::Id::BFI_RC:
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return {GetRegister(instr.gpr39),
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)};
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case OpCode::Id::BFI_IMM_R:
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return {GetRegister(instr.gpr39), Immediate(instr.alu.GetSignedImm20_20())};
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return {Immediate(instr.alu.GetSignedImm20_20()), GetRegister(instr.gpr39)};
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default:
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UNREACHABLE();
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return {Immediate(0), Immediate(0)};
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