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Merge pull request #3808 from ReinUsesLisp/wait-for-idle

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{maxwell_3d,buffer_cache}: Implement memory barriers using 3D registers
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bunnei 2020-05-03 02:43:18 -04:00 • committed by GitHub
commit 2aff0b4733
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13 changed files with 57 additions and 16 deletions
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6
src/video_core/buffer_cache/buffer_cache.h
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@ -88,10 +88,6 @@ public:
map->MarkAsWritten(true);
MarkRegionAsWritten(map->GetStart(), map->GetEnd() - 1);
}
} else {
if (map->IsWritten()) {
WriteBarrier();
}
}
return {ToHandle(block), static_cast<u64>(block->GetOffset(cpu_addr))};
@ -253,8 +249,6 @@ protected:
virtual BufferType ToHandle(const OwnerBuffer& storage) = 0;
virtual void WriteBarrier() = 0;
virtual OwnerBuffer CreateBlock(VAddr cpu_addr, std::size_t size) = 0;
virtual void UploadBlockData(const OwnerBuffer& buffer, std::size_t offset, std::size_t size,