Core: Initial implementation of device memory mapping
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src/video_core/host1x/gpu_device_memory_manager.cpp
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src/video_core/host1x/gpu_device_memory_manager.cpp
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// SPDX-FileCopyrightText: 2023 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "core/device_memory_manager.inc"
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#include "video_core/host1x/gpu_device_memory_manager.h"
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#include "video_core/rasterizer_interface.h"
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template struct Core::DeviceMemoryManagerAllocator<Tegra::MaxwellDeviceTraits>;
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template class Core::DeviceMemoryManager<Tegra::MaxwellDeviceTraits>;
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template const u8* Tegra::MaxwellDeviceMemoryManager::GetPointer<u8>(DAddr addr) const;
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template u8* Tegra::MaxwellDeviceMemoryManager::GetPointer<u8>(DAddr addr);
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template u8 Tegra::MaxwellDeviceMemoryManager::Read<u8>(DAddr addr) const;
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template u16 Tegra::MaxwellDeviceMemoryManager::Read<u16>(DAddr addr) const;
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template u32 Tegra::MaxwellDeviceMemoryManager::Read<u32>(DAddr addr) const;
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template u64 Tegra::MaxwellDeviceMemoryManager::Read<u64>(DAddr addr) const;
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template void Tegra::MaxwellDeviceMemoryManager::Write<u8>(DAddr addr, u8 data);
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template void Tegra::MaxwellDeviceMemoryManager::Write<u16>(DAddr addr, u16 data);
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template void Tegra::MaxwellDeviceMemoryManager::Write<u32>(DAddr addr, u32 data);
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template void Tegra::MaxwellDeviceMemoryManager::Write<u64>(DAddr addr, u64 data);
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src/video_core/host1x/gpu_device_memory_manager.h
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src/video_core/host1x/gpu_device_memory_manager.h
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// SPDX-FileCopyrightText: 2023 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "core/device_memory_manager.h"
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namespace VideoCore {
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class RasterizerInterface;
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}
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namespace Tegra {
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struct MaxwellDeviceTraits {
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static constexpr bool supports_pinning = true;
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static constexpr size_t device_virtual_bits = 34;
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using DeviceInterface = typename VideoCore::RasterizerInterface;
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};
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using MaxwellDeviceMemoryManager = Core::DeviceMemoryManager<MaxwellDeviceTraits>;
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} // namespace Tegra
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