Core/Common: Address Feedback.
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e486c66850
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2f8947583f
21 changed files with 58 additions and 58 deletions
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@ -148,7 +148,7 @@ public:
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*/
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virtual void SetTPIDR_EL0(u64 value) = 0;
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virtual void ChangeProcessorId(std::size_t new_core_id) = 0;
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virtual void ChangeProcessorID(std::size_t new_core_id) = 0;
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virtual void SaveContext(ThreadContext32& ctx) = 0;
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virtual void SaveContext(ThreadContext64& ctx) = 0;
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@ -23,7 +23,7 @@ public:
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CPUInterruptHandler(CPUInterruptHandler&&) = default;
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CPUInterruptHandler& operator=(CPUInterruptHandler&&) = default;
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constexpr bool IsInterrupted() const {
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bool IsInterrupted() const {
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return is_interrupted;
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}
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@ -107,7 +107,7 @@ public:
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u64 GetTicksRemaining() override {
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if (parent.uses_wall_clock) {
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if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
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return 1000U;
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return minimum_run_cycles;
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}
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return 0U;
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}
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@ -116,6 +116,7 @@ public:
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ARM_Dynarmic_32& parent;
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std::size_t num_interpreted_instructions{};
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static constexpr u64 minimum_run_cycles = 1000U;
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};
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std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable& page_table,
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@ -214,7 +215,7 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) {
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cp15->uprw = static_cast<u32>(value);
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}
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void ARM_Dynarmic_32::ChangeProcessorId(std::size_t new_core_id) {
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void ARM_Dynarmic_32::ChangeProcessorID(std::size_t new_core_id) {
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jit->ChangeProcessorID(new_core_id);
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}
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@ -47,7 +47,7 @@ public:
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void SetTlsAddress(VAddr address) override;
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void SetTPIDR_EL0(u64 value) override;
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u64 GetTPIDR_EL0() const override;
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void ChangeProcessorId(std::size_t new_core_id) override;
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void ChangeProcessorID(std::size_t new_core_id) override;
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void SaveContext(ThreadContext32& ctx) override;
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void SaveContext(ThreadContext64& ctx) override {}
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@ -144,7 +144,7 @@ public:
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u64 GetTicksRemaining() override {
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if (parent.uses_wall_clock) {
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if (!parent.interrupt_handlers[parent.core_index].IsInterrupted()) {
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return 1000U;
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return minimum_run_cycles;
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}
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return 0U;
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}
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@ -159,6 +159,7 @@ public:
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std::size_t num_interpreted_instructions = 0;
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u64 tpidrro_el0 = 0;
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u64 tpidr_el0 = 0;
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static constexpr u64 minimum_run_cycles = 1000U;
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};
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std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable& page_table,
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@ -271,7 +272,7 @@ void ARM_Dynarmic_64::SetTPIDR_EL0(u64 value) {
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cb->tpidr_el0 = value;
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}
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void ARM_Dynarmic_64::ChangeProcessorId(std::size_t new_core_id) {
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void ARM_Dynarmic_64::ChangeProcessorID(std::size_t new_core_id) {
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jit->ChangeProcessorID(new_core_id);
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}
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@ -45,7 +45,7 @@ public:
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void SetTlsAddress(VAddr address) override;
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void SetTPIDR_EL0(u64 value) override;
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u64 GetTPIDR_EL0() const override;
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void ChangeProcessorId(std::size_t new_core_id) override;
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void ChangeProcessorID(std::size_t new_core_id) override;
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void SaveContext(ThreadContext32& ctx) override {}
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void SaveContext(ThreadContext64& ctx) override;
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@ -159,7 +159,7 @@ void ARM_Unicorn::SetTPIDR_EL0(u64 value) {
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CHECKED(uc_reg_write(uc, UC_ARM64_REG_TPIDR_EL0, &value));
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}
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void ARM_Unicorn::ChangeProcessorId(std::size_t new_core_id) {
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void ARM_Unicorn::ChangeProcessorID(std::size_t new_core_id) {
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core_index = new_core_id;
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}
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@ -36,7 +36,7 @@ public:
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void SetTlsAddress(VAddr address) override;
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void SetTPIDR_EL0(u64 value) override;
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u64 GetTPIDR_EL0() const override;
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void ChangeProcessorId(std::size_t new_core_id) override;
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void ChangeProcessorID(std::size_t new_core_id) override;
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void PrepareReschedule() override;
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void ClearExclusiveState() override;
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void ExecuteInstructions(std::size_t num_instructions);
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