shader: Implement VOTE
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d40faa1db0
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3d07cef009
18 changed files with 182 additions and 6 deletions
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@ -1444,4 +1444,20 @@ F32 IREmitter::ImageSampleDrefExplicitLod(const Value& handle, const Value& coor
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return Inst<F32>(op, Flags{info}, handle, coords, dref, lod_lc, offset);
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}
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U1 IREmitter::VoteAll(const U1& value) {
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return Inst<U1>(Opcode::VoteAll, value);
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}
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U1 IREmitter::VoteAny(const U1& value) {
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return Inst<U1>(Opcode::VoteAny, value);
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}
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U1 IREmitter::VoteEqual(const U1& value) {
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return Inst<U1>(Opcode::VoteEqual, value);
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}
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U32 IREmitter::SubgroupBallot(const U1& value) {
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return Inst<U32>(Opcode::SubgroupBallot, value);
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}
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} // namespace Shader::IR
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@ -234,6 +234,11 @@ public:
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const Value& offset, const F32& lod_clamp,
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TextureInstInfo info);
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[[nodiscard]] U1 VoteAll(const U1& value);
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[[nodiscard]] U1 VoteAny(const U1& value);
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[[nodiscard]] U1 VoteEqual(const U1& value);
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[[nodiscard]] U32 SubgroupBallot(const U1& value);
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private:
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IR::Block::iterator insertion_point;
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@ -355,3 +355,9 @@ OPCODE(ImageSampleImplicitLod, F32x4, U32,
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OPCODE(ImageSampleExplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
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OPCODE(ImageSampleDrefImplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
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OPCODE(ImageSampleDrefExplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
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// Vote operations
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OPCODE(VoteAll, U1, U1, )
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OPCODE(VoteAny, U1, U1, )
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OPCODE(VoteEqual, U1, U1, )
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OPCODE(SubgroupBallot, U32, U1, )
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@ -417,10 +417,6 @@ void TranslatorVisitor::VMNMX(u64) {
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ThrowNotImplemented(Opcode::VMNMX);
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}
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void TranslatorVisitor::VOTE(u64) {
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ThrowNotImplemented(Opcode::VOTE);
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}
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void TranslatorVisitor::VOTE_vtg(u64) {
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ThrowNotImplemented(Opcode::VOTE_vtg);
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}
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@ -0,0 +1,52 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <optional>
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
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namespace Shader::Maxwell {
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namespace {
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enum class VoteOp : u64 {
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ALL,
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ANY,
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EQ,
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};
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[[nodiscard]] IR::U1 VoteOperation(IR::IREmitter& ir, const IR::U1& pred, VoteOp vote_op) {
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switch (vote_op) {
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case VoteOp::ALL:
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return ir.VoteAll(pred);
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case VoteOp::ANY:
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return ir.VoteAny(pred);
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case VoteOp::EQ:
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return ir.VoteEqual(pred);
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default:
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throw NotImplementedException("Invalid VOTE op {}", vote_op);
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}
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}
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void Vote(TranslatorVisitor& v, u64 insn) {
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union {
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u64 insn;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<39, 3, IR::Pred> pred_a;
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BitField<42, 1, u64> neg_pred_a;
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BitField<45, 3, IR::Pred> pred_b;
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BitField<48, 2, VoteOp> vote_op;
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} const vote{insn};
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const IR::U1 vote_pred{v.ir.GetPred(vote.pred_a, vote.neg_pred_a != 0)};
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v.ir.SetPred(vote.pred_b, VoteOperation(v.ir, vote_pred, vote.vote_op));
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v.X(vote.dest_reg, v.ir.SubgroupBallot(vote_pred));
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}
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} // Anonymous namespace
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void TranslatorVisitor::VOTE(u64 insn) {
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Vote(*this, insn);
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}
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} // namespace Shader::Maxwell
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