shader: Implement ATOM/S and RED
This commit is contained in:
parent
479ca00071
commit
3db2b3effa
21 changed files with 1745 additions and 19 deletions
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@ -15,6 +15,53 @@
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namespace Shader::Backend::SPIRV {
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namespace {
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enum class CasFunctionType {
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Increment,
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Decrement,
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FPAdd,
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FPMin,
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FPMax,
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};
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Id CasFunction(EmitContext& ctx, CasFunctionType function_type, Id value_type) {
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const Id func_type{ctx.TypeFunction(value_type, value_type, value_type)};
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const Id func{ctx.OpFunction(value_type, spv::FunctionControlMask::MaskNone, func_type)};
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const Id op_a{ctx.OpFunctionParameter(value_type)};
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const Id op_b{ctx.OpFunctionParameter(value_type)};
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ctx.AddLabel();
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Id result{};
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switch (function_type) {
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case CasFunctionType::Increment: {
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const Id pred{ctx.OpUGreaterThanEqual(ctx.U1, op_a, op_b)};
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const Id incr{ctx.OpIAdd(value_type, op_a, ctx.Constant(value_type, 1))};
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result = ctx.OpSelect(value_type, pred, ctx.u32_zero_value, incr);
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break;
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}
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case CasFunctionType::Decrement: {
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const Id lhs{ctx.OpIEqual(ctx.U1, op_a, ctx.Constant(value_type, 0u))};
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const Id rhs{ctx.OpUGreaterThan(ctx.U1, op_a, op_b)};
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const Id pred{ctx.OpLogicalOr(ctx.U1, lhs, rhs)};
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const Id decr{ctx.OpISub(value_type, op_a, ctx.Constant(value_type, 1))};
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result = ctx.OpSelect(value_type, pred, op_b, decr);
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break;
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}
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case CasFunctionType::FPAdd:
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result = ctx.OpFAdd(value_type, op_a, op_b);
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break;
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case CasFunctionType::FPMin:
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result = ctx.OpFMin(value_type, op_a, op_b);
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break;
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case CasFunctionType::FPMax:
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result = ctx.OpFMax(value_type, op_a, op_b);
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break;
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default:
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break;
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}
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ctx.OpReturnValue(result);
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ctx.OpFunctionEnd();
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return func;
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}
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Id ImageType(EmitContext& ctx, const TextureDescriptor& desc) {
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const spv::ImageFormat format{spv::ImageFormat::Unknown};
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const Id type{ctx.F32[1]};
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@ -196,6 +243,56 @@ Id EmitContext::Def(const IR::Value& value) {
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}
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}
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Id EmitContext::CasLoop(Id function, CasPointerType pointer_type, Id value_type) {
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const Id loop_header{OpLabel()};
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const Id continue_block{OpLabel()};
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const Id merge_block{OpLabel()};
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const Id storage_type{pointer_type == CasPointerType::Shared ? shared_memory_u32_type
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: storage_memory_u32};
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const Id func_type{TypeFunction(value_type, U32[1], value_type, storage_type)};
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const Id func{OpFunction(value_type, spv::FunctionControlMask::MaskNone, func_type)};
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const Id index{OpFunctionParameter(U32[1])};
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const Id op_b{OpFunctionParameter(value_type)};
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const Id base{OpFunctionParameter(storage_type)};
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AddLabel();
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const Id one{Constant(U32[1], 1)};
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OpBranch(loop_header);
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AddLabel(loop_header);
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OpLoopMerge(merge_block, continue_block, spv::LoopControlMask::MaskNone);
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OpBranch(continue_block);
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AddLabel(continue_block);
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const Id word_pointer{pointer_type == CasPointerType::Shared
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? OpAccessChain(shared_u32, base, index)
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: OpAccessChain(storage_u32, base, u32_zero_value, index)};
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if (value_type.value == F32[2].value) {
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const Id u32_value{OpLoad(U32[1], word_pointer)};
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const Id value{OpUnpackHalf2x16(F32[2], u32_value)};
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const Id new_value{OpFunctionCall(value_type, function, value, op_b)};
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const Id u32_new_value{OpPackHalf2x16(U32[1], new_value)};
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const Id atomic_res{OpAtomicCompareExchange(U32[1], word_pointer, one, u32_zero_value,
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u32_zero_value, u32_new_value, u32_value)};
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const Id success{OpIEqual(U1, atomic_res, u32_value)};
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OpBranchConditional(success, merge_block, loop_header);
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AddLabel(merge_block);
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OpReturnValue(OpUnpackHalf2x16(F32[2], atomic_res));
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} else {
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const Id value{OpLoad(U32[1], word_pointer)};
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const Id new_value{OpBitcast(
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U32[1], OpFunctionCall(value_type, function, OpBitcast(value_type, value), op_b))};
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const Id atomic_res{OpAtomicCompareExchange(U32[1], word_pointer, one, u32_zero_value,
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u32_zero_value, new_value, value)};
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const Id success{OpIEqual(U1, atomic_res, value)};
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OpBranchConditional(success, merge_block, loop_header);
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AddLabel(merge_block);
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OpReturnValue(OpBitcast(value_type, atomic_res));
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}
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OpFunctionEnd();
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return func;
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}
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void EmitContext::DefineCommonTypes(const Info& info) {
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void_id = TypeVoid();
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@ -300,9 +397,9 @@ void EmitContext::DefineSharedMemory(const IR::Program& program) {
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}
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const u32 num_elements{Common::DivCeil(program.shared_memory_size, 4U)};
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const Id type{TypeArray(U32[1], Constant(U32[1], num_elements))};
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const Id pointer_type{TypePointer(spv::StorageClass::Workgroup, type)};
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shared_memory_u32_type = TypePointer(spv::StorageClass::Workgroup, type);
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shared_u32 = TypePointer(spv::StorageClass::Workgroup, U32[1]);
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shared_memory_u32 = AddGlobalVariable(pointer_type, spv::StorageClass::Workgroup);
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shared_memory_u32 = AddGlobalVariable(shared_memory_u32_type, spv::StorageClass::Workgroup);
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interfaces.push_back(shared_memory_u32);
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const Id func_type{TypeFunction(void_id, U32[1], U32[1])};
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@ -346,6 +443,14 @@ void EmitContext::DefineSharedMemory(const IR::Program& program) {
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if (program.info.uses_int16) {
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shared_store_u16_func = make_function(16, 16);
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}
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if (program.info.uses_shared_increment) {
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const Id inc_func{CasFunction(*this, CasFunctionType::Increment, U32[1])};
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increment_cas_shared = CasLoop(inc_func, CasPointerType::Shared, U32[1]);
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}
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if (program.info.uses_shared_decrement) {
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const Id dec_func{CasFunction(*this, CasFunctionType::Decrement, U32[1])};
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decrement_cas_shared = CasLoop(dec_func, CasPointerType::Shared, U32[1]);
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}
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}
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void EmitContext::DefineAttributeMemAccess(const Info& info) {
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@ -530,12 +635,12 @@ void EmitContext::DefineStorageBuffers(const Info& info, u32& binding) {
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MemberName(struct_type, 0, "data");
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MemberDecorate(struct_type, 0, spv::Decoration::Offset, 0U);
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const Id storage_type{TypePointer(spv::StorageClass::StorageBuffer, struct_type)};
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storage_memory_u32 = TypePointer(spv::StorageClass::StorageBuffer, struct_type);
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storage_u32 = TypePointer(spv::StorageClass::StorageBuffer, U32[1]);
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u32 index{};
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for (const StorageBufferDescriptor& desc : info.storage_buffers_descriptors) {
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const Id id{AddGlobalVariable(storage_type, spv::StorageClass::StorageBuffer)};
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const Id id{AddGlobalVariable(storage_memory_u32, spv::StorageClass::StorageBuffer)};
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Decorate(id, spv::Decoration::Binding, binding);
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Decorate(id, spv::Decoration::DescriptorSet, 0U);
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Name(id, fmt::format("ssbo{}", index));
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@ -546,6 +651,51 @@ void EmitContext::DefineStorageBuffers(const Info& info, u32& binding) {
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index += desc.count;
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binding += desc.count;
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}
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if (info.uses_global_increment) {
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AddCapability(spv::Capability::VariablePointersStorageBuffer);
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const Id inc_func{CasFunction(*this, CasFunctionType::Increment, U32[1])};
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increment_cas_ssbo = CasLoop(inc_func, CasPointerType::Ssbo, U32[1]);
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}
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if (info.uses_global_decrement) {
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AddCapability(spv::Capability::VariablePointersStorageBuffer);
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const Id dec_func{CasFunction(*this, CasFunctionType::Decrement, U32[1])};
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decrement_cas_ssbo = CasLoop(dec_func, CasPointerType::Ssbo, U32[1]);
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}
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if (info.uses_atomic_f32_add) {
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AddCapability(spv::Capability::VariablePointersStorageBuffer);
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const Id add_func{CasFunction(*this, CasFunctionType::FPAdd, F32[1])};
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f32_add_cas = CasLoop(add_func, CasPointerType::Ssbo, F32[1]);
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}
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if (info.uses_atomic_f16x2_add) {
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AddCapability(spv::Capability::VariablePointersStorageBuffer);
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const Id add_func{CasFunction(*this, CasFunctionType::FPAdd, F16[2])};
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f16x2_add_cas = CasLoop(add_func, CasPointerType::Ssbo, F16[2]);
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}
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if (info.uses_atomic_f16x2_min) {
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AddCapability(spv::Capability::VariablePointersStorageBuffer);
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const Id func{CasFunction(*this, CasFunctionType::FPMin, F16[2])};
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f16x2_min_cas = CasLoop(func, CasPointerType::Ssbo, F16[2]);
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}
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if (info.uses_atomic_f16x2_max) {
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AddCapability(spv::Capability::VariablePointersStorageBuffer);
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const Id func{CasFunction(*this, CasFunctionType::FPMax, F16[2])};
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f16x2_max_cas = CasLoop(func, CasPointerType::Ssbo, F16[2]);
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}
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if (info.uses_atomic_f32x2_add) {
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AddCapability(spv::Capability::VariablePointersStorageBuffer);
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const Id add_func{CasFunction(*this, CasFunctionType::FPAdd, F32[2])};
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f32x2_add_cas = CasLoop(add_func, CasPointerType::Ssbo, F32[2]);
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}
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if (info.uses_atomic_f32x2_min) {
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AddCapability(spv::Capability::VariablePointersStorageBuffer);
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const Id func{CasFunction(*this, CasFunctionType::FPMin, F32[2])};
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f32x2_min_cas = CasLoop(func, CasPointerType::Ssbo, F32[2]);
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}
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if (info.uses_atomic_f32x2_max) {
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AddCapability(spv::Capability::VariablePointersStorageBuffer);
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const Id func{CasFunction(*this, CasFunctionType::FPMax, F32[2])};
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f32x2_max_cas = CasLoop(func, CasPointerType::Ssbo, F32[2]);
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}
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}
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void EmitContext::DefineTextureBuffers(const Info& info, u32& binding) {
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@ -94,6 +94,7 @@ public:
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Id output_f32{};
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Id storage_u32{};
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Id storage_memory_u32{};
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Id image_buffer_type{};
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Id sampled_texture_buffer_type{};
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Id shared_memory_u32{};
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Id shared_memory_u32x2{};
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Id shared_memory_u32x4{};
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Id shared_memory_u32_type{};
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Id shared_store_u8_func{};
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Id shared_store_u16_func{};
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Id increment_cas_shared{};
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Id increment_cas_ssbo{};
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Id decrement_cas_shared{};
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Id decrement_cas_ssbo{};
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Id f32_add_cas{};
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Id f16x2_add_cas{};
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Id f16x2_min_cas{};
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Id f16x2_max_cas{};
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Id f32x2_add_cas{};
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Id f32x2_min_cas{};
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Id f32x2_max_cas{};
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Id input_position{};
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std::array<Id, 32> input_generics{};
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@ -153,6 +166,11 @@ public:
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std::vector<Id> interfaces;
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private:
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enum class CasPointerType {
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Shared,
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Ssbo,
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};
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void DefineCommonTypes(const Info& info);
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void DefineCommonConstants();
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void DefineInterfaces(const Info& info);
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@ -171,6 +189,8 @@ private:
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void DefineInputs(const Info& info);
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void DefineOutputs(const Info& info);
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[[nodiscard]] Id CasLoop(Id function, CasPointerType pointer_type, Id value_type);
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};
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} // namespace Shader::Backend::SPIRV
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@ -238,6 +238,9 @@ void SetupCapabilities(const Profile& profile, const Info& info, EmitContext& ct
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ctx.AddCapability(spv::Capability::SubgroupVoteKHR);
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}
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}
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if (info.uses_64_bit_atomics && profile.support_int64_atomics) {
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ctx.AddCapability(spv::Capability::Int64Atomics);
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}
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if (info.uses_typeless_image_reads && profile.support_typeless_image_loads) {
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ctx.AddCapability(spv::Capability::StorageImageReadWithoutFormat);
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}
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@ -306,6 +306,101 @@ Id EmitUGreaterThan(EmitContext& ctx, Id lhs, Id rhs);
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Id EmitINotEqual(EmitContext& ctx, Id lhs, Id rhs);
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Id EmitSGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs);
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Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs);
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Id EmitSharedAtomicIAdd32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicSMin32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicUMin32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicSMax32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicUMax32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicInc32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicDec32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicAnd32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicOr32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicXor32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicExchange32(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitSharedAtomicExchange64(EmitContext& ctx, Id pointer_offset, Id value);
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Id EmitStorageAtomicIAdd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicSMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicUMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicSMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicUMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicInc32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicDec32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicAnd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicOr32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicXor32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicExchange32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicIAdd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicSMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicUMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicSMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicUMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicAnd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicOr64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicXor64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicAddF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicAddF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicAddF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicMinF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicMinF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicMaxF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitStorageAtomicMaxF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
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Id value);
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Id EmitGlobalAtomicIAdd32(EmitContext& ctx);
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Id EmitGlobalAtomicSMin32(EmitContext& ctx);
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Id EmitGlobalAtomicUMin32(EmitContext& ctx);
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Id EmitGlobalAtomicSMax32(EmitContext& ctx);
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Id EmitGlobalAtomicUMax32(EmitContext& ctx);
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Id EmitGlobalAtomicInc32(EmitContext& ctx);
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Id EmitGlobalAtomicDec32(EmitContext& ctx);
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Id EmitGlobalAtomicAnd32(EmitContext& ctx);
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Id EmitGlobalAtomicOr32(EmitContext& ctx);
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Id EmitGlobalAtomicXor32(EmitContext& ctx);
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Id EmitGlobalAtomicExchange32(EmitContext& ctx);
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Id EmitGlobalAtomicIAdd64(EmitContext& ctx);
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Id EmitGlobalAtomicSMin64(EmitContext& ctx);
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Id EmitGlobalAtomicUMin64(EmitContext& ctx);
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Id EmitGlobalAtomicSMax64(EmitContext& ctx);
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Id EmitGlobalAtomicUMax64(EmitContext& ctx);
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Id EmitGlobalAtomicInc64(EmitContext& ctx);
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Id EmitGlobalAtomicDec64(EmitContext& ctx);
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Id EmitGlobalAtomicAnd64(EmitContext& ctx);
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Id EmitGlobalAtomicOr64(EmitContext& ctx);
|
||||
Id EmitGlobalAtomicXor64(EmitContext& ctx);
|
||||
Id EmitGlobalAtomicExchange64(EmitContext& ctx);
|
||||
Id EmitGlobalAtomicAddF32(EmitContext& ctx);
|
||||
Id EmitGlobalAtomicAddF16x2(EmitContext& ctx);
|
||||
Id EmitGlobalAtomicAddF32x2(EmitContext& ctx);
|
||||
Id EmitGlobalAtomicMinF16x2(EmitContext& ctx);
|
||||
Id EmitGlobalAtomicMinF32x2(EmitContext& ctx);
|
||||
Id EmitGlobalAtomicMaxF16x2(EmitContext& ctx);
|
||||
Id EmitGlobalAtomicMaxF32x2(EmitContext& ctx);
|
||||
Id EmitLogicalOr(EmitContext& ctx, Id a, Id b);
|
||||
Id EmitLogicalAnd(EmitContext& ctx, Id a, Id b);
|
||||
Id EmitLogicalXor(EmitContext& ctx, Id a, Id b);
|
||||
|
|
528
src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
Normal file
528
src/shader_recompiler/backend/spirv/emit_spirv_atomic.cpp
Normal file
|
@ -0,0 +1,528 @@
|
|||
// Copyright 2021 yuzu Emulator Project
|
||||
// Licensed under GPLv2 or any later version
|
||||
// Refer to the license.txt file included.
|
||||
|
||||
#include "shader_recompiler/backend/spirv/emit_spirv.h"
|
||||
|
||||
namespace Shader::Backend::SPIRV {
|
||||
namespace {
|
||||
|
||||
Id GetSharedPointer(EmitContext& ctx, Id offset, u32 index_offset = 0) {
|
||||
const Id shift_id{ctx.Constant(ctx.U32[1], 2U)};
|
||||
const Id shifted_value{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift_id)};
|
||||
const Id index{ctx.OpIAdd(ctx.U32[1], shifted_value, ctx.Constant(ctx.U32[1], index_offset))};
|
||||
return ctx.profile.support_explicit_workgroup_layout
|
||||
? ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, ctx.u32_zero_value, index)
|
||||
: ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, index);
|
||||
}
|
||||
|
||||
Id StorageIndex(EmitContext& ctx, const IR::Value& offset, size_t element_size) {
|
||||
if (offset.IsImmediate()) {
|
||||
const u32 imm_offset{static_cast<u32>(offset.U32() / element_size)};
|
||||
return ctx.Constant(ctx.U32[1], imm_offset);
|
||||
}
|
||||
const u32 shift{static_cast<u32>(std::countr_zero(element_size))};
|
||||
const Id index{ctx.Def(offset)};
|
||||
if (shift == 0) {
|
||||
return index;
|
||||
}
|
||||
const Id shift_id{ctx.Constant(ctx.U32[1], shift)};
|
||||
return ctx.OpShiftRightLogical(ctx.U32[1], index, shift_id);
|
||||
}
|
||||
|
||||
Id GetStoragePointer(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
u32 index_offset = 0) {
|
||||
// TODO: Support reinterpreting bindings, guaranteed to be aligned
|
||||
if (!binding.IsImmediate()) {
|
||||
throw NotImplementedException("Dynamic storage buffer indexing");
|
||||
}
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
const Id index{ctx.OpIAdd(ctx.U32[1], base_index, ctx.Constant(ctx.U32[1], index_offset))};
|
||||
return ctx.OpAccessChain(ctx.storage_u32, ssbo, ctx.u32_zero_value, index);
|
||||
}
|
||||
|
||||
std::pair<Id, Id> GetAtomicArgs(EmitContext& ctx) {
|
||||
const Id scope{ctx.Constant(ctx.U32[1], static_cast<u32>(spv::Scope::Device))};
|
||||
const Id semantics{ctx.u32_zero_value};
|
||||
return {scope, semantics};
|
||||
}
|
||||
|
||||
Id LoadU64(EmitContext& ctx, Id pointer_1, Id pointer_2) {
|
||||
const Id value_1{ctx.OpLoad(ctx.U32[1], pointer_1)};
|
||||
const Id value_2{ctx.OpLoad(ctx.U32[1], pointer_2)};
|
||||
const Id original_composite{ctx.OpCompositeConstruct(ctx.U32[2], value_1, value_2)};
|
||||
return ctx.OpBitcast(ctx.U64, original_composite);
|
||||
}
|
||||
|
||||
void StoreResult(EmitContext& ctx, Id pointer_1, Id pointer_2, Id result) {
|
||||
const Id composite{ctx.OpBitcast(ctx.U32[2], result)};
|
||||
ctx.OpStore(pointer_1, ctx.OpCompositeExtract(ctx.U32[1], composite, 0));
|
||||
ctx.OpStore(pointer_2, ctx.OpCompositeExtract(ctx.U32[1], composite, 1));
|
||||
}
|
||||
} // Anonymous namespace
|
||||
|
||||
Id EmitSharedAtomicIAdd32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer{GetSharedPointer(ctx, pointer_offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicIAdd(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicSMin32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer{GetSharedPointer(ctx, pointer_offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicSMin(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicUMin32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer{GetSharedPointer(ctx, pointer_offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicUMin(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicSMax32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer{GetSharedPointer(ctx, pointer_offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicSMax(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicUMax32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer{GetSharedPointer(ctx, pointer_offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicUMax(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicInc32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id shift_id{ctx.Constant(ctx.U32[1], 2U)};
|
||||
const Id index{ctx.OpShiftRightArithmetic(ctx.U32[1], pointer_offset, shift_id)};
|
||||
return ctx.OpFunctionCall(ctx.U32[1], ctx.increment_cas_shared, index, value,
|
||||
ctx.shared_memory_u32);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicDec32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id shift_id{ctx.Constant(ctx.U32[1], 2U)};
|
||||
const Id index{ctx.OpShiftRightArithmetic(ctx.U32[1], pointer_offset, shift_id)};
|
||||
return ctx.OpFunctionCall(ctx.U32[1], ctx.decrement_cas_shared, index, value,
|
||||
ctx.shared_memory_u32);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicAnd32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer{GetSharedPointer(ctx, pointer_offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicAnd(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicOr32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer{GetSharedPointer(ctx, pointer_offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicOr(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicXor32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer{GetSharedPointer(ctx, pointer_offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicXor(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicExchange32(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer{GetSharedPointer(ctx, pointer_offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicExchange(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitSharedAtomicExchange64(EmitContext& ctx, Id pointer_offset, Id value) {
|
||||
const Id pointer_1{GetSharedPointer(ctx, pointer_offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicExchange(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetSharedPointer(ctx, pointer_offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, value);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicIAdd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer{GetStoragePointer(ctx, binding, offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicIAdd(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicSMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer{GetStoragePointer(ctx, binding, offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicSMin(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicUMin32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer{GetStoragePointer(ctx, binding, offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicUMin(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicSMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer{GetStoragePointer(ctx, binding, offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicSMax(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicUMax32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer{GetStoragePointer(ctx, binding, offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicUMax(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicInc32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
return ctx.OpFunctionCall(ctx.U32[1], ctx.increment_cas_ssbo, base_index, value, ssbo);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicDec32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
return ctx.OpFunctionCall(ctx.U32[1], ctx.decrement_cas_ssbo, base_index, value, ssbo);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicAnd32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer{GetStoragePointer(ctx, binding, offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicAnd(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicOr32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer{GetStoragePointer(ctx, binding, offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicOr(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicXor32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer{GetStoragePointer(ctx, binding, offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicXor(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicExchange32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer{GetStoragePointer(ctx, binding, offset)};
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicExchange(ctx.U32[1], pointer, scope, semantics, value);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicIAdd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicIAdd(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
const Id result{ctx.OpIAdd(ctx.U64, value, original_value)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, result);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicSMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicSMin(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
const Id result{ctx.OpSMin(ctx.U64, value, original_value)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, result);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicUMin64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicUMin(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
const Id result{ctx.OpUMin(ctx.U64, value, original_value)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, result);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicSMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicSMax(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
const Id result{ctx.OpSMax(ctx.U64, value, original_value)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, result);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicUMax64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicUMax(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
const Id result{ctx.OpUMax(ctx.U64, value, original_value)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, result);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicAnd64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicAnd(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
const Id result{ctx.OpBitwiseAnd(ctx.U64, value, original_value)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, result);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicOr64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicOr(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
const Id result{ctx.OpBitwiseOr(ctx.U64, value, original_value)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, result);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicXor64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicXor(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
const Id result{ctx.OpBitwiseXor(ctx.U64, value, original_value)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, result);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id pointer_1{GetStoragePointer(ctx, binding, offset)};
|
||||
if (ctx.profile.support_int64_atomics) {
|
||||
const auto [scope, semantics]{GetAtomicArgs(ctx)};
|
||||
return ctx.OpAtomicExchange(ctx.U64, pointer_1, scope, semantics, value);
|
||||
}
|
||||
// LOG_WARNING(Render_Vulkan, "Int64 Atomics not supported, fallback to non-atomic");
|
||||
const Id pointer_2{GetStoragePointer(ctx, binding, offset, 1)};
|
||||
const Id original_value{LoadU64(ctx, pointer_1, pointer_2)};
|
||||
StoreResult(ctx, pointer_1, pointer_2, value);
|
||||
return original_value;
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicAddF32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
return ctx.OpFunctionCall(ctx.F32[1], ctx.f32_add_cas, base_index, value, ssbo);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicAddF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
const Id result{ctx.OpFunctionCall(ctx.F16[2], ctx.f16x2_add_cas, base_index, value, ssbo)};
|
||||
return ctx.OpBitcast(ctx.U32[1], result);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicAddF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
const Id result{ctx.OpFunctionCall(ctx.F32[2], ctx.f32x2_add_cas, base_index, value, ssbo)};
|
||||
return ctx.OpPackHalf2x16(ctx.U32[1], result);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicMinF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
const Id result{ctx.OpFunctionCall(ctx.F16[2], ctx.f16x2_min_cas, base_index, value, ssbo)};
|
||||
return ctx.OpBitcast(ctx.U32[1], result);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicMinF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
const Id result{ctx.OpFunctionCall(ctx.F32[2], ctx.f32x2_min_cas, base_index, value, ssbo)};
|
||||
return ctx.OpPackHalf2x16(ctx.U32[1], result);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicMaxF16x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
const Id result{ctx.OpFunctionCall(ctx.F16[2], ctx.f16x2_max_cas, base_index, value, ssbo)};
|
||||
return ctx.OpBitcast(ctx.U32[1], result);
|
||||
}
|
||||
|
||||
Id EmitStorageAtomicMaxF32x2(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value) {
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id base_index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
const Id result{ctx.OpFunctionCall(ctx.F32[2], ctx.f32x2_max_cas, base_index, value, ssbo)};
|
||||
return ctx.OpPackHalf2x16(ctx.U32[1], result);
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicIAdd32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicSMin32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicUMin32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicSMax32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicUMax32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicInc32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicDec32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicAnd32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicOr32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicXor32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicExchange32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicIAdd64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicSMin64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicUMin64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicSMax64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicUMax64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicInc64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicDec64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicAnd64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicOr64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicXor64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicExchange64(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicAddF32(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicAddF16x2(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicAddF32x2(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicMinF16x2(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicMinF32x2(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicMaxF16x2(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
Id EmitGlobalAtomicMaxF32x2(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
} // namespace Shader::Backend::SPIRV
|
Loading…
Add table
Add a link
Reference in a new issue