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shader: Address feedback + clang format

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lat9nq 2021-04-10 02:32:55 -04:00 • committed by ameerj
parent 0bb85f6a75
commit 5bfcafa0a2
12 changed files with 22 additions and 24 deletions
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2
src/shader_recompiler/frontend/ir/opcodes.cpp
View file

@ -49,7 +49,7 @@ constexpr std::array META_TABLE{
#define OPCODE(name_token, type_token, ...) \
OpcodeMeta{ \
.name{#name_token}, \
.type = type_token, \
.type = type_token, \
.arg_types{__VA_ARGS__}, \
},
#include "opcodes.inc"

4
src/shader_recompiler/frontend/maxwell/control_flow.cpp
View file

@ -44,7 +44,7 @@ void Split(Block* old_block, Block* new_block, Location pc) {
*new_block = Block{};
new_block->begin = pc;
new_block->end = old_block->end;
new_block->end_class = old_block->end_class,
new_block->end_class = old_block->end_class;
new_block->cond = old_block->cond;
new_block->stack = old_block->stack;
new_block->branch_true = old_block->branch_true;
@ -428,7 +428,7 @@ CFG::AnalysisState CFG::AnalyzeBRX(Block* block, Location pc, Instruction inst,
if (!is_absolute) {
target += pc.Offset();
}
target += static_cast<unsigned int>(brx_table->branch_offset);
target += static_cast<u32>(brx_table->branch_offset);
target += 8;
targets.push_back(target);
}

16
src/shader_recompiler/frontend/maxwell/control_flow.h
View file

@ -78,15 +78,15 @@ struct Block : boost::intrusive::set_base_hook<
Location begin;
Location end;
EndClass end_class;
IR::Condition cond;
EndClass end_class{};
IR::Condition cond{};
Stack stack;
Block* branch_true;
Block* branch_false;
FunctionId function_call;
Block* return_block;
IR::Reg branch_reg;
s32 branch_offset;
Block* branch_true{};
Block* branch_false{};
FunctionId function_call{};
Block* return_block{};
IR::Reg branch_reg{};
s32 branch_offset{};
std::vector<IndirectBranch> indirect_branches;
};

2
src/shader_recompiler/frontend/maxwell/decode.cpp
View file

@ -56,7 +56,7 @@ constexpr std::array UNORDERED_ENCODINGS{
#define INST(name, cute, encode) \
InstEncoding{ \
.mask_value{MaskValueFromEncoding(encode)}, \
.opcode = Opcode::name, \
.opcode = Opcode::name, \
},
#include "maxwell.inc"
#undef INST

5
src/shader_recompiler/frontend/maxwell/translate/impl/common_funcs.cpp
View file

@ -72,8 +72,9 @@ bool IsCompareOpOrdered(FPCompareOp op) {
}
}
IR::U1 FloatingPointCompare(IR::IREmitter& ir, const IR::F16F32F64& operand_1, const IR::F16F32F64& operand_2,
FPCompareOp compare_op, IR::FpControl control) {
IR::U1 FloatingPointCompare(IR::IREmitter& ir, const IR::F16F32F64& operand_1,
const IR::F16F32F64& operand_2, FPCompareOp compare_op,
IR::FpControl control) {
const bool ordered{IsCompareOpOrdered(compare_op)};
switch (compare_op) {
case FPCompareOp::F:

1
src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
View file

@ -65,7 +65,6 @@ void TranslatorVisitor::CS2R(u64) {
ThrowNotImplemented(Opcode::CS2R);
}
void TranslatorVisitor::FCHK_reg(u64) {
ThrowNotImplemented(Opcode::FCHK_reg);
}