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shader: Add logging

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This commit is contained in:
ReinUsesLisp 2021-06-14 02:27:49 -03:00 • committed by ameerj
parent 373f75d944
commit 61cd7dd301
15 changed files with 38 additions and 28 deletions
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2
src/shader_recompiler/frontend/ir/ir_emitter.cpp
View file

@ -270,7 +270,7 @@ static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) {
case FlowTest::RGT:
return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag()));
case FlowTest::FCSM_TR:
// LOG_WARNING(ShaderDecompiler, "FCSM_TR CC State (Stubbed)");
LOG_WARNING(Shader, "(STUBBED) FCSM_TR");
return ir.Imm1(false);
case FlowTest::CSM_TA:
case FlowTest::CSM_TR:

2
src/shader_recompiler/frontend/maxwell/translate/impl/internal_stage_buffer_entry_read.cpp
View file

@ -46,7 +46,7 @@ void TranslatorVisitor::ISBERD(u64 insn) {
if (isberd.shift != Shift::Default) {
throw NotImplementedException("Shift {}", isberd.shift.Value());
}
// LOG_WARNING(..., "ISBERD is stubbed");
LOG_WARNING(Shader, "(STUBBED) called");
X(isberd.dest_reg, X(isberd.src_reg));
}

8
src/shader_recompiler/frontend/maxwell/translate/impl/move_special_register.cpp
View file

@ -118,7 +118,7 @@ enum class SpecialRegister : u64 {
case SpecialRegister::SR_THREAD_KILL:
return IR::U32{ir.Select(ir.IsHelperInvocation(), ir.Imm32(-1), ir.Imm32(0))};
case SpecialRegister::SR_INVOCATION_INFO:
// LOG_WARNING(..., "SR_INVOCATION_INFO is stubbed");
LOG_WARNING(Shader, "(STUBBED) SR_INVOCATION_INFO");
return ir.Imm32(0x00ff'0000);
case SpecialRegister::SR_TID: {
const IR::Value tid{ir.LocalInvocationId()};
@ -140,10 +140,10 @@ enum class SpecialRegister : u64 {
case SpecialRegister::SR_CTAID_Z:
return ir.WorkgroupIdZ();
case SpecialRegister::SR_WSCALEFACTOR_XY:
// LOG_WARNING(..., "SR_WSCALEFACTOR_XY is stubbed");
LOG_WARNING(Shader, "(STUBBED) SR_WSCALEFACTOR_XY");
return ir.Imm32(Common::BitCast<u32>(1.0f));
case SpecialRegister::SR_WSCALEFACTOR_Z:
// LOG_WARNING(..., "SR_WSCALEFACTOR_Z is stubbed");
LOG_WARNING(Shader, "(STUBBED) SR_WSCALEFACTOR_Z");
return ir.Imm32(Common::BitCast<u32>(1.0f));
case SpecialRegister::SR_LANEID:
return ir.LaneId();
@ -160,7 +160,7 @@ enum class SpecialRegister : u64 {
case SpecialRegister::SR_Y_DIRECTION:
return ir.BitCast<IR::U32>(ir.YDirection());
case SpecialRegister::SR_AFFINITY:
// LOG_WARNING(..., "SR_AFFINITY is stubbed");
LOG_WARNING(Shader, "(STUBBED) SR_AFFINITY");
return ir.Imm32(0); // This is the default value hardware returns.
default:
throw NotImplementedException("S2R special register {}", special_register);

2
src/shader_recompiler/frontend/maxwell/translate/impl/vote.cpp
View file

@ -48,7 +48,7 @@ void TranslatorVisitor::VOTE(u64 insn) {
}
void TranslatorVisitor::VOTE_vtg(u64) {
// LOG_WARNING(ShaderDecompiler, "VOTE.VTG: Stubbed!");
LOG_WARNING(Shader, "(STUBBED) called");
}
} // namespace Shader::Maxwell