video_core: Resolve more variable shadowing scenarios

Resolves variable shadowing scenarios up to the end of the OpenGL code
to make it nicer to review. The rest will be resolved in a following
commit.
This commit is contained in:
Lioncash 2020-12-04 14:39:12 -05:00
parent fad38ec6e8
commit 677a8b208d
42 changed files with 219 additions and 206 deletions

View file

@ -11,16 +11,16 @@
namespace Tegra::Engines::Upload {
State::State(MemoryManager& memory_manager, Registers& regs)
: regs{regs}, memory_manager{memory_manager} {}
State::State(MemoryManager& memory_manager_, Registers& regs_)
: regs{regs_}, memory_manager{memory_manager_} {}
State::~State() = default;
void State::ProcessExec(const bool is_linear) {
void State::ProcessExec(const bool is_linear_) {
write_offset = 0;
copy_size = regs.line_length_in * regs.line_count;
inner_buffer.resize(copy_size);
this->is_linear = is_linear;
is_linear = is_linear_;
}
void State::ProcessData(const u32 data, const bool is_last_call) {

View file

@ -54,10 +54,10 @@ struct Registers {
class State {
public:
State(MemoryManager& memory_manager, Registers& regs);
explicit State(MemoryManager& memory_manager_, Registers& regs_);
~State();
void ProcessExec(bool is_linear);
void ProcessExec(bool is_linear_);
void ProcessData(u32 data, bool is_last_call);
private:

View file

@ -14,8 +14,8 @@
namespace Tegra::Engines {
KeplerMemory::KeplerMemory(Core::System& system, MemoryManager& memory_manager)
: system{system}, upload_state{memory_manager, regs.upload} {}
KeplerMemory::KeplerMemory(Core::System& system_, MemoryManager& memory_manager)
: system{system_}, upload_state{memory_manager, regs.upload} {}
KeplerMemory::~KeplerMemory() = default;

View file

@ -35,7 +35,7 @@ namespace Tegra::Engines {
class KeplerMemory final : public EngineInterface {
public:
KeplerMemory(Core::System& system, MemoryManager& memory_manager);
explicit KeplerMemory(Core::System& system_, MemoryManager& memory_manager);
~KeplerMemory();
/// Write the value to the register identified by method.

View file

@ -16,8 +16,10 @@ namespace Tegra::Engines {
using namespace Texture;
MaxwellDMA::MaxwellDMA(Core::System& system, MemoryManager& memory_manager)
: system{system}, memory_manager{memory_manager} {}
MaxwellDMA::MaxwellDMA(Core::System& system_, MemoryManager& memory_manager_)
: system{system_}, memory_manager{memory_manager_} {}
MaxwellDMA::~MaxwellDMA() = default;
void MaxwellDMA::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
ASSERT_MSG(method < NUM_REGS, "Invalid MaxwellDMA register");

View file

@ -185,8 +185,8 @@ public:
};
static_assert(sizeof(RemapConst) == 12);
explicit MaxwellDMA(Core::System& system, MemoryManager& memory_manager);
~MaxwellDMA() = default;
explicit MaxwellDMA(Core::System& system_, MemoryManager& memory_manager_);
~MaxwellDMA();
/// Write the value to the register identified by method.
void CallMethod(u32 method, u32 method_argument, bool is_last_call) override;