Mirrors/yuzu
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Pica/CommandProcessor: Properly implement shader load destination offset registers.

Browse source
This commit is contained in:
Tony Wasserka 2015-01-02 20:59:23 +01:00
parent 67120270f2
commit 6c26ec72a5
2 changed files with 10 additions and 20 deletions
Download patch file Download diff file Expand all files Collapse all files

8
src/video_core/pica.h
View file

@ -678,7 +678,9 @@ struct Regs {
INSERT_PADDING_WORDS(0x2);
struct {
u32 begin_load;
// Offset of the next instruction to write code to.
// Incremented with each instruction write.
u32 offset;
// Writing to these registers sets the "current" word in the shader program.
// TODO: It's not clear how the hardware stores what the "current" word is.
@ -690,7 +692,9 @@ struct Regs {
// This register group is used to load an internal table of swizzling patterns,
// which are indexed by each shader instruction to specify vector component swizzling.
struct {
u32 begin_load;
// Offset of the next swizzle pattern to write code to.
// Incremented with each instruction write.
u32 offset;
// Writing to these registers sets the "current" swizzle pattern in the table.
// TODO: It's not clear how the hardware stores what the "current" swizzle pattern is.