shader_recompiler: Align SSBO offsets in GlobalMemory functions
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735612c9b3
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75c5be55af
7 changed files with 19 additions and 6 deletions
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@ -1796,7 +1796,8 @@ Binding BufferCache<P>::StorageBufferBinding(GPUVAddr ssbo_addr, u32 cbuf_index,
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return NULL_BINDING;
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}
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const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr);
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ASSERT_MSG(cpu_addr, "Unaligned storage buffer address not found for cbuf index {}", cbuf_index);
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ASSERT_MSG(cpu_addr, "Unaligned storage buffer address not found for cbuf index {}",
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cbuf_index);
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// The end address used for size calculation does not need to be aligned
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const VAddr cpu_end = Common::AlignUp(*cpu_addr + size, Core::Memory::YUZU_PAGESIZE);
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@ -232,6 +232,7 @@ ShaderCache::ShaderCache(RasterizerOpenGL& rasterizer_, Core::Frontend::EmuWindo
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.has_gl_bool_ref_bug = device.HasBoolRefBug(),
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.ignore_nan_fp_comparisons = true,
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.gl_max_compute_smem_size = device.GetMaxComputeSharedMemorySize(),
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.min_ssbo_alignment = device.GetShaderStorageBufferAlignment(),
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},
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host_info{
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.support_float64 = true,
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@ -359,6 +359,7 @@ PipelineCache::PipelineCache(RasterizerVulkan& rasterizer_, const Device& device
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driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY,
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.has_broken_robust =
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device.IsNvidia() && device.GetNvidiaArch() <= NvidiaArchitecture::Arch_Pascal,
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.min_ssbo_alignment = device.GetStorageBufferAlignment(),
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};
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host_info = Shader::HostTranslateInfo{
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