hle: kernel: multicore: Replace n-JITs impl. with 4 JITs.

src/core/arm/arm_interface.h

@@ -64,6 +64,9 @@ public:
     /// Step CPU by one instruction
     virtual void Step() = 0;
 
+    /// Exits execution from a callback, the callback must rewind the stack
+    virtual void ExceptionalExit() = 0;
+
     /// Clear all instruction cache
     virtual void ClearInstructionCache() = 0;
 

src/core/arm/dynarmic/arm_dynarmic_32.cpp

@@ -189,6 +189,10 @@ void ARM_Dynarmic_32::Run() {
     jit->Run();
 }
 
+void ARM_Dynarmic_32::ExceptionalExit() {
+    jit->ExceptionalExit();
+}
+
 void ARM_Dynarmic_32::Step() {
     jit->Step();
 }

src/core/arm/dynarmic/arm_dynarmic_32.h

@@ -42,6 +42,7 @@ public:
     u32 GetPSTATE() const override;
     void SetPSTATE(u32 pstate) override;
     void Run() override;
+    void ExceptionalExit() override;
     void Step() override;
     VAddr GetTlsAddress() const override;
     void SetTlsAddress(VAddr address) override;

src/core/arm/dynarmic/arm_dynarmic_64.cpp

@@ -220,6 +220,10 @@ void ARM_Dynarmic_64::Run() {
     jit->Run();
 }
 
+void ARM_Dynarmic_64::ExceptionalExit() {
+    jit->ExceptionalExit();
+}
+
 void ARM_Dynarmic_64::Step() {
     cb->InterpreterFallback(jit->GetPC(), 1);
 }

src/core/arm/dynarmic/arm_dynarmic_64.h

@@ -40,6 +40,7 @@ public:
     void SetPSTATE(u32 pstate) override;
     void Run() override;
     void Step() override;
+    void ExceptionalExit() override;
     VAddr GetTlsAddress() const override;
     void SetTlsAddress(VAddr address) override;
     void SetTPIDR_EL0(u64 value) override;