core: decouple ARM interface from Dynarmic

This commit is contained in:
Liam 2023-06-12 21:34:25 -04:00
parent f9197f4dae
commit 8506915208
15 changed files with 189 additions and 172 deletions

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@ -0,0 +1,29 @@
// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
#include <dynarmic/interface/halt_reason.h>
#include "core/arm/arm_interface.h"
namespace Core {
constexpr Dynarmic::HaltReason StepThread = Dynarmic::HaltReason::Step;
constexpr Dynarmic::HaltReason DataAbort = Dynarmic::HaltReason::MemoryAbort;
constexpr Dynarmic::HaltReason BreakLoop = Dynarmic::HaltReason::UserDefined2;
constexpr Dynarmic::HaltReason SupervisorCall = Dynarmic::HaltReason::UserDefined3;
constexpr Dynarmic::HaltReason InstructionBreakpoint = Dynarmic::HaltReason::UserDefined4;
constexpr Dynarmic::HaltReason PrefetchAbort = Dynarmic::HaltReason::UserDefined6;
constexpr HaltReason TranslateHaltReason(Dynarmic::HaltReason hr) {
static_assert(static_cast<u64>(HaltReason::StepThread) == static_cast<u64>(StepThread));
static_assert(static_cast<u64>(HaltReason::DataAbort) == static_cast<u64>(DataAbort));
static_assert(static_cast<u64>(HaltReason::BreakLoop) == static_cast<u64>(BreakLoop));
static_assert(static_cast<u64>(HaltReason::SupervisorCall) == static_cast<u64>(SupervisorCall));
static_assert(static_cast<u64>(HaltReason::InstructionBreakpoint) ==
static_cast<u64>(InstructionBreakpoint));
static_assert(static_cast<u64>(HaltReason::PrefetchAbort) == static_cast<u64>(PrefetchAbort));
return static_cast<HaltReason>(hr);
}
} // namespace Core

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@ -10,9 +10,10 @@
#include "common/logging/log.h"
#include "common/page_table.h"
#include "common/settings.h"
#include "core/arm/dynarmic/arm_dynarmic.h"
#include "core/arm/dynarmic/arm_dynarmic_32.h"
#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
#include "core/arm/dynarmic/arm_exclusive_monitor.h"
#include "core/arm/dynarmic/dynarmic_cp15.h"
#include "core/arm/dynarmic/dynarmic_exclusive_monitor.h"
#include "core/core.h"
#include "core/core_timing.h"
#include "core/debugger/debugger.h"
@ -104,11 +105,11 @@ public:
switch (exception) {
case Dynarmic::A32::Exception::NoExecuteFault:
LOG_CRITICAL(Core_ARM, "Cannot execute instruction at unmapped address {:#08x}", pc);
ReturnException(pc, ARM_Interface::no_execute);
ReturnException(pc, PrefetchAbort);
return;
default:
if (debugger_enabled) {
ReturnException(pc, ARM_Interface::breakpoint);
ReturnException(pc, InstructionBreakpoint);
return;
}
@ -121,7 +122,7 @@ public:
void CallSVC(u32 swi) override {
parent.svc_swi = swi;
parent.jit.load()->HaltExecution(ARM_Interface::svc_call);
parent.jit.load()->HaltExecution(SupervisorCall);
}
void AddTicks(u64 ticks) override {
@ -162,7 +163,7 @@ public:
if (!memory.IsValidVirtualAddressRange(addr, size)) {
LOG_CRITICAL(Core_ARM, "Stopping execution due to unmapped memory access at {:#x}",
addr);
parent.jit.load()->HaltExecution(ARM_Interface::no_execute);
parent.jit.load()->HaltExecution(PrefetchAbort);
return false;
}
@ -173,7 +174,7 @@ public:
const auto match{parent.MatchingWatchpoint(addr, size, type)};
if (match) {
parent.halted_watchpoint = match;
parent.jit.load()->HaltExecution(ARM_Interface::watchpoint);
parent.jit.load()->HaltExecution(DataAbort);
return false;
}
@ -329,12 +330,12 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
return std::make_unique<Dynarmic::A32::Jit>(config);
}
Dynarmic::HaltReason ARM_Dynarmic_32::RunJit() {
return jit.load()->Run();
HaltReason ARM_Dynarmic_32::RunJit() {
return TranslateHaltReason(jit.load()->Run());
}
Dynarmic::HaltReason ARM_Dynarmic_32::StepJit() {
return jit.load()->Step();
HaltReason ARM_Dynarmic_32::StepJit() {
return TranslateHaltReason(jit.load()->Step());
}
u32 ARM_Dynarmic_32::GetSvcNumber() const {
@ -408,7 +409,7 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) {
cp15->uprw = static_cast<u32>(value);
}
void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) {
void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) const {
Dynarmic::A32::Jit* j = jit.load();
ctx.cpu_registers = j->Regs();
ctx.extension_registers = j->ExtRegs();
@ -425,11 +426,11 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) {
}
void ARM_Dynarmic_32::SignalInterrupt() {
jit.load()->HaltExecution(break_loop);
jit.load()->HaltExecution(BreakLoop);
}
void ARM_Dynarmic_32::ClearInterrupt() {
jit.load()->ClearHalt(break_loop);
jit.load()->ClearHalt(BreakLoop);
}
void ARM_Dynarmic_32::ClearInstructionCache() {
@ -462,39 +463,4 @@ void ARM_Dynarmic_32::PageTableChanged(Common::PageTable& page_table,
jit_cache.emplace(key, std::move(new_jit));
}
std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_32::GetBacktrace(Core::System& system,
u64 fp, u64 lr, u64 pc) {
std::vector<BacktraceEntry> out;
auto& memory = system.ApplicationMemory();
out.push_back({"", 0, pc, 0, ""});
// fp (= r11) points to the last frame record.
// Frame records are two words long:
// fp+0 : pointer to previous frame record
// fp+4 : value of lr for frame
for (size_t i = 0; i < 256; i++) {
out.push_back({"", 0, lr, 0, ""});
if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 8)) {
break;
}
lr = memory.Read32(fp + 4);
fp = memory.Read32(fp);
}
SymbolicateBacktrace(system, out);
return out;
}
std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_32::GetBacktraceFromContext(
System& system, const ThreadContext32& ctx) {
const auto& reg = ctx.cpu_registers;
return GetBacktrace(system, reg[11], reg[14], reg[15]);
}
std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_32::GetBacktrace() const {
return GetBacktrace(system, GetReg(11), GetReg(14), GetReg(15));
}
} // namespace Core

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@ -50,8 +50,11 @@ public:
return (GetPSTATE() & 0x20) != 0;
}
void SaveContext(ThreadContext32& ctx) override;
void SaveContext(ThreadContext64& ctx) override {}
Architecture GetArchitecture() const override {
return Architecture::Aarch32;
}
void SaveContext(ThreadContext32& ctx) const override;
void SaveContext(ThreadContext64& ctx) const override {}
void LoadContext(const ThreadContext32& ctx) override;
void LoadContext(const ThreadContext64& ctx) override {}
@ -64,14 +67,9 @@ public:
void PageTableChanged(Common::PageTable& new_page_table,
std::size_t new_address_space_size_in_bits) override;
static std::vector<BacktraceEntry> GetBacktraceFromContext(System& system,
const ThreadContext32& ctx);
std::vector<BacktraceEntry> GetBacktrace() const override;
protected:
Dynarmic::HaltReason RunJit() override;
Dynarmic::HaltReason StepJit() override;
HaltReason RunJit() override;
HaltReason StepJit() override;
u32 GetSvcNumber() const override;
const Kernel::DebugWatchpoint* HaltedWatchpoint() const override;
void RewindBreakpointInstruction() override;

View file

@ -10,8 +10,9 @@
#include "common/logging/log.h"
#include "common/page_table.h"
#include "common/settings.h"
#include "core/arm/dynarmic/arm_dynarmic.h"
#include "core/arm/dynarmic/arm_dynarmic_64.h"
#include "core/arm/dynarmic/arm_exclusive_monitor.h"
#include "core/arm/dynarmic/dynarmic_exclusive_monitor.h"
#include "core/core.h"
#include "core/core_timing.h"
#include "core/debugger/debugger.h"
@ -113,7 +114,7 @@ public:
LOG_ERROR(Core_ARM,
"Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc,
num_instructions, memory.Read32(pc));
ReturnException(pc, ARM_Interface::no_execute);
ReturnException(pc, PrefetchAbort);
}
void InstructionCacheOperationRaised(Dynarmic::A64::InstructionCacheOperation op,
@ -148,11 +149,11 @@ public:
return;
case Dynarmic::A64::Exception::NoExecuteFault:
LOG_CRITICAL(Core_ARM, "Cannot execute instruction at unmapped address {:#016x}", pc);
ReturnException(pc, ARM_Interface::no_execute);
ReturnException(pc, PrefetchAbort);
return;
default:
if (debugger_enabled) {
ReturnException(pc, ARM_Interface::breakpoint);
ReturnException(pc, InstructionBreakpoint);
return;
}
@ -164,7 +165,7 @@ public:
void CallSVC(u32 swi) override {
parent.svc_swi = swi;
parent.jit.load()->HaltExecution(ARM_Interface::svc_call);
parent.jit.load()->HaltExecution(SupervisorCall);
}
void AddTicks(u64 ticks) override {
@ -207,7 +208,7 @@ public:
if (!memory.IsValidVirtualAddressRange(addr, size)) {
LOG_CRITICAL(Core_ARM, "Stopping execution due to unmapped memory access at {:#x}",
addr);
parent.jit.load()->HaltExecution(ARM_Interface::no_execute);
parent.jit.load()->HaltExecution(PrefetchAbort);
return false;
}
@ -218,7 +219,7 @@ public:
const auto match{parent.MatchingWatchpoint(addr, size, type)};
if (match) {
parent.halted_watchpoint = match;
parent.jit.load()->HaltExecution(ARM_Interface::watchpoint);
parent.jit.load()->HaltExecution(DataAbort);
return false;
}
@ -383,12 +384,12 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
return std::make_shared<Dynarmic::A64::Jit>(config);
}
Dynarmic::HaltReason ARM_Dynarmic_64::RunJit() {
return jit.load()->Run();
HaltReason ARM_Dynarmic_64::RunJit() {
return TranslateHaltReason(jit.load()->Run());
}
Dynarmic::HaltReason ARM_Dynarmic_64::StepJit() {
return jit.load()->Step();
HaltReason ARM_Dynarmic_64::StepJit() {
return TranslateHaltReason(jit.load()->Step());
}
u32 ARM_Dynarmic_64::GetSvcNumber() const {
@ -464,7 +465,7 @@ void ARM_Dynarmic_64::SetTPIDR_EL0(u64 value) {
cb->tpidr_el0 = value;
}
void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) {
void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) const {
Dynarmic::A64::Jit* j = jit.load();
ctx.cpu_registers = j->GetRegisters();
ctx.sp = j->GetSP();
@ -489,11 +490,11 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) {
}
void ARM_Dynarmic_64::SignalInterrupt() {
jit.load()->HaltExecution(break_loop);
jit.load()->HaltExecution(BreakLoop);
}
void ARM_Dynarmic_64::ClearInterrupt() {
jit.load()->ClearHalt(break_loop);
jit.load()->ClearHalt(BreakLoop);
}
void ARM_Dynarmic_64::ClearInstructionCache() {
@ -526,39 +527,4 @@ void ARM_Dynarmic_64::PageTableChanged(Common::PageTable& page_table,
jit_cache.emplace(key, std::move(new_jit));
}
std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_64::GetBacktrace(Core::System& system,
u64 fp, u64 lr, u64 pc) {
std::vector<BacktraceEntry> out;
auto& memory = system.ApplicationMemory();
out.push_back({"", 0, pc, 0, ""});
// fp (= x29) points to the previous frame record.
// Frame records are two words long:
// fp+0 : pointer to previous frame record
// fp+8 : value of lr for frame
for (size_t i = 0; i < 256; i++) {
out.push_back({"", 0, lr, 0, ""});
if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 16)) {
break;
}
lr = memory.Read64(fp + 8);
fp = memory.Read64(fp);
}
SymbolicateBacktrace(system, out);
return out;
}
std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_64::GetBacktraceFromContext(
System& system, const ThreadContext64& ctx) {
const auto& reg = ctx.cpu_registers;
return GetBacktrace(system, reg[29], reg[30], ctx.pc);
}
std::vector<ARM_Interface::BacktraceEntry> ARM_Dynarmic_64::GetBacktrace() const {
return GetBacktrace(system, GetReg(29), GetReg(30), GetPC());
}
} // namespace Core

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@ -43,8 +43,11 @@ public:
void SetTPIDR_EL0(u64 value) override;
u64 GetTPIDR_EL0() const override;
void SaveContext(ThreadContext32& ctx) override {}
void SaveContext(ThreadContext64& ctx) override;
Architecture GetArchitecture() const override {
return Architecture::Aarch64;
}
void SaveContext(ThreadContext32& ctx) const override {}
void SaveContext(ThreadContext64& ctx) const override;
void LoadContext(const ThreadContext32& ctx) override {}
void LoadContext(const ThreadContext64& ctx) override;
@ -57,14 +60,9 @@ public:
void PageTableChanged(Common::PageTable& new_page_table,
std::size_t new_address_space_size_in_bits) override;
static std::vector<BacktraceEntry> GetBacktraceFromContext(System& system,
const ThreadContext64& ctx);
std::vector<BacktraceEntry> GetBacktrace() const override;
protected:
Dynarmic::HaltReason RunJit() override;
Dynarmic::HaltReason StepJit() override;
HaltReason RunJit() override;
HaltReason StepJit() override;
u32 GetSvcNumber() const override;
const Kernel::DebugWatchpoint* HaltedWatchpoint() const override;
void RewindBreakpointInstruction() override;
@ -73,8 +71,6 @@ private:
std::shared_ptr<Dynarmic::A64::Jit> MakeJit(Common::PageTable* page_table,
std::size_t address_space_bits) const;
static std::vector<BacktraceEntry> GetBacktrace(Core::System& system, u64 fp, u64 lr, u64 pc);
using JitCacheKey = std::pair<Common::PageTable*, std::size_t>;
using JitCacheType =
std::unordered_map<JitCacheKey, std::shared_ptr<Dynarmic::A64::Jit>, Common::PairHash>;

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@ -4,7 +4,7 @@
#include <fmt/format.h>
#include "common/logging/log.h"
#include "core/arm/dynarmic/arm_dynarmic_32.h"
#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
#include "core/arm/dynarmic/dynarmic_cp15.h"
#include "core/core.h"
#include "core/core_timing.h"

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@ -1,7 +1,7 @@
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
#include "core/arm/dynarmic/arm_exclusive_monitor.h"
#include "core/arm/dynarmic/dynarmic_exclusive_monitor.h"
#include "core/memory.h"
namespace Core {