Pica/VertexShader: Remove (now) duplicated shader bytecode definitions in favor of nihstro's ones.
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056a8f9dfa
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2 changed files with 30 additions and 222 deletions
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@ -8,11 +8,18 @@
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#include <core/mem_map.h>
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#include <nihstro/shader_bytecode.h>
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#include "debug_utils/debug_utils.h"
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#include "pica.h"
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#include "vertex_shader.h"
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using nihstro::Instruction;
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using nihstro::RegisterType;
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using nihstro::SourceRegister;
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using nihstro::SwizzlePattern;
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namespace Pica {
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namespace VertexShader {
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@ -70,19 +77,28 @@ static void ProcessShaderCode(VertexShaderState& state) {
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const Instruction& instr = *(const Instruction*)state.program_counter;
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state.debug.max_offset = std::max<u32>(state.debug.max_offset, 1 + (state.program_counter - shader_memory));
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const float24* src1_ = (instr.common.src1 < 0x10) ? state.input_register_table[instr.common.src1.GetIndex()]
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: (instr.common.src1 < 0x20) ? &state.temporary_registers[instr.common.src1.GetIndex()].x
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: (instr.common.src1 < 0x80) ? &shader_uniforms.f[instr.common.src1.GetIndex()].x
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: nullptr;
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const float24* src2_ = (instr.common.src2 < 0x10) ? state.input_register_table[instr.common.src2.GetIndex()]
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: &state.temporary_registers[instr.common.src2.GetIndex()].x;
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auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* {
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switch (source_reg.GetRegisterType()) {
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case RegisterType::Input:
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return state.input_register_table[source_reg.GetIndex()];
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case RegisterType::Temporary:
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return &state.temporary_registers[source_reg.GetIndex()].x;
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case RegisterType::FloatUniform:
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return &shader_uniforms.f[source_reg.GetIndex()].x;
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}
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};
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bool is_inverted = 0 != (instr.opcode.GetInfo().subtype & Instruction::OpCodeInfo::SrcInversed);
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const float24* src1_ = LookupSourceRegister(instr.common.GetSrc1(is_inverted));
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const float24* src2_ = LookupSourceRegister(instr.common.GetSrc2(is_inverted));
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float24* dest = (instr.common.dest < 0x08) ? state.output_register_table[4*instr.common.dest.GetIndex()]
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: (instr.common.dest < 0x10) ? nullptr
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: (instr.common.dest < 0x20) ? &state.temporary_registers[instr.common.dest.GetIndex()][0]
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: nullptr;
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const SwizzlePattern& swizzle = *(SwizzlePattern*)&swizzle_data[instr.common.operand_desc_id];
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const bool negate_src1 = (swizzle.negate != 0);
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const bool negate_src1 = (swizzle.negate_src1 != 0);
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float24 src1[4] = {
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src1_[(int)swizzle.GetSelectorSrc1(0)],
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@ -192,7 +208,9 @@ static void ProcessShaderCode(VertexShaderState& state) {
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break;
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}
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case Instruction::OpCode::RET:
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// NOP is currently used as a heuristic for leaving from a function.
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// TODO: This is completely incorrect.
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case Instruction::OpCode::NOP:
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if (*state.call_stack_pointer == VertexShaderState::INVALID_ADDRESS) {
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exit_loop = true;
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} else {
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@ -209,17 +227,16 @@ static void ProcessShaderCode(VertexShaderState& state) {
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_dbg_assert_(HW_GPU, state.call_stack_pointer - state.call_stack < sizeof(state.call_stack));
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*++state.call_stack_pointer = state.program_counter - shader_memory;
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// TODO: Does this offset refer to the beginning of shader memory?
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state.program_counter = &shader_memory[instr.flow_control.offset_words];
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state.program_counter = &shader_memory[instr.flow_control.dest_offset];
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break;
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case Instruction::OpCode::FLS:
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// TODO: Do whatever needs to be done here?
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case Instruction::OpCode::END:
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// TODO
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break;
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default:
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LOG_ERROR(HW_GPU, "Unhandled instruction: 0x%02x (%s): 0x%08x",
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(int)instr.opcode.Value(), instr.GetOpCodeName().c_str(), instr.hex);
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(int)instr.opcode.Value(), instr.opcode.GetInfo().name, instr.hex);
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break;
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}
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