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shader: Initial implementation of an AST

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This commit is contained in:
ReinUsesLisp 2021-02-11 16:39:06 -03:00 • committed by ameerj
parent 2930dccecc
commit 9170200a11
33 changed files with 1347 additions and 591 deletions
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45
src/shader_recompiler/backend/spirv/emit_spirv.cpp
View file

@ -105,8 +105,26 @@ void EmitSPIRV::EmitInst(EmitContext& ctx, IR::Inst* inst) {
throw LogicError("Invalid opcode {}", inst->Opcode());
}
void EmitSPIRV::EmitPhi(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
static Id TypeId(const EmitContext& ctx, IR::Type type) {
switch (type) {
case IR::Type::U1:
return ctx.u1;
default:
throw NotImplementedException("Phi node type {}", type);
}
}
Id EmitSPIRV::EmitPhi(EmitContext& ctx, IR::Inst* inst) {
const size_t num_args{inst->NumArgs()};
boost::container::small_vector<Id, 64> operands;
operands.reserve(num_args * 2);
for (size_t index = 0; index < num_args; ++index) {
IR::Block* const phi_block{inst->PhiBlock(index)};
operands.push_back(ctx.Def(inst->Arg(index)));
operands.push_back(ctx.BlockLabel(phi_block));
}
const Id result_type{TypeId(ctx, inst->Arg(0).Type())};
return ctx.OpPhi(result_type, std::span(operands.data(), operands.size()));
}
void EmitSPIRV::EmitVoid(EmitContext&) {}
@ -115,6 +133,29 @@ void EmitSPIRV::EmitIdentity(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
// FIXME: Move to its own file
void EmitSPIRV::EmitBranch(EmitContext& ctx, IR::Inst* inst) {
ctx.OpBranch(ctx.BlockLabel(inst->Arg(0).Label()));
}
void EmitSPIRV::EmitBranchConditional(EmitContext& ctx, IR::Inst* inst) {
ctx.OpBranchConditional(ctx.Def(inst->Arg(0)), ctx.BlockLabel(inst->Arg(1).Label()),
ctx.BlockLabel(inst->Arg(2).Label()));
}
void EmitSPIRV::EmitLoopMerge(EmitContext& ctx, IR::Inst* inst) {
ctx.OpLoopMerge(ctx.BlockLabel(inst->Arg(0).Label()), ctx.BlockLabel(inst->Arg(1).Label()),
spv::LoopControlMask::MaskNone);
}
void EmitSPIRV::EmitSelectionMerge(EmitContext& ctx, IR::Inst* inst) {
ctx.OpSelectionMerge(ctx.BlockLabel(inst->Arg(0).Label()), spv::SelectionControlMask::MaskNone);
}
void EmitSPIRV::EmitReturn(EmitContext& ctx) {
ctx.OpReturn();
}
void EmitSPIRV::EmitGetZeroFromOp(EmitContext&) {
throw LogicError("Unreachable instruction");
}

18
src/shader_recompiler/backend/spirv/emit_spirv.h
View file

@ -124,18 +124,20 @@ private:
void EmitInst(EmitContext& ctx, IR::Inst* inst);
// Microinstruction emitters
void EmitPhi(EmitContext& ctx);
Id EmitPhi(EmitContext& ctx, IR::Inst* inst);
void EmitVoid(EmitContext& ctx);
void EmitIdentity(EmitContext& ctx);
void EmitBranch(EmitContext& ctx, IR::Inst* inst);
void EmitBranchConditional(EmitContext& ctx, IR::Inst* inst);
void EmitExit(EmitContext& ctx);
void EmitLoopMerge(EmitContext& ctx, IR::Inst* inst);
void EmitSelectionMerge(EmitContext& ctx, IR::Inst* inst);
void EmitReturn(EmitContext& ctx);
void EmitUnreachable(EmitContext& ctx);
void EmitGetRegister(EmitContext& ctx);
void EmitSetRegister(EmitContext& ctx);
void EmitGetPred(EmitContext& ctx);
void EmitSetPred(EmitContext& ctx);
void EmitSetGotoVariable(EmitContext& ctx);
void EmitGetGotoVariable(EmitContext& ctx);
Id EmitGetCbuf(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
void EmitGetAttribute(EmitContext& ctx);
void EmitSetAttribute(EmitContext& ctx);
@ -151,11 +153,11 @@ private:
void EmitSetOFlag(EmitContext& ctx);
Id EmitWorkgroupId(EmitContext& ctx);
Id EmitLocalInvocationId(EmitContext& ctx);
void EmitUndef1(EmitContext& ctx);
void EmitUndef8(EmitContext& ctx);
void EmitUndef16(EmitContext& ctx);
void EmitUndef32(EmitContext& ctx);
void EmitUndef64(EmitContext& ctx);
Id EmitUndefU1(EmitContext& ctx);
void EmitUndefU8(EmitContext& ctx);
void EmitUndefU16(EmitContext& ctx);
void EmitUndefU32(EmitContext& ctx);
void EmitUndefU64(EmitContext& ctx);
void EmitLoadGlobalU8(EmitContext& ctx);
void EmitLoadGlobalS8(EmitContext& ctx);
void EmitLoadGlobalU16(EmitContext& ctx);

8
src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
View file

@ -22,6 +22,14 @@ void EmitSPIRV::EmitSetPred(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
void EmitSPIRV::EmitSetGotoVariable(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
void EmitSPIRV::EmitGetGotoVariable(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
Id EmitSPIRV::EmitGetCbuf(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset) {
if (!binding.IsImmediate()) {
throw NotImplementedException("Constant buffer indexing");

25
src/shader_recompiler/backend/spirv/emit_spirv_control_flow.cpp
View file

@ -3,28 +3,3 @@
// Refer to the license.txt file included.
#include "shader_recompiler/backend/spirv/emit_spirv.h"
namespace Shader::Backend::SPIRV {
void EmitSPIRV::EmitBranch(EmitContext& ctx, IR::Inst* inst) {
ctx.OpBranch(ctx.BlockLabel(inst->Arg(0).Label()));
}
void EmitSPIRV::EmitBranchConditional(EmitContext& ctx, IR::Inst* inst) {
ctx.OpBranchConditional(ctx.Def(inst->Arg(0)), ctx.BlockLabel(inst->Arg(1).Label()),
ctx.BlockLabel(inst->Arg(2).Label()));
}
void EmitSPIRV::EmitExit(EmitContext& ctx) {
ctx.OpReturn();
}
void EmitSPIRV::EmitReturn(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
void EmitSPIRV::EmitUnreachable(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
} // namespace Shader::Backend::SPIRV

16
src/shader_recompiler/backend/spirv/emit_spirv_undefined.cpp
View file

@ -6,23 +6,23 @@
namespace Shader::Backend::SPIRV {
void EmitSPIRV::EmitUndef1(EmitContext&) {
Id EmitSPIRV::EmitUndefU1(EmitContext& ctx) {
return ctx.OpUndef(ctx.u1);
}
void EmitSPIRV::EmitUndefU8(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
void EmitSPIRV::EmitUndef8(EmitContext&) {
void EmitSPIRV::EmitUndefU16(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
void EmitSPIRV::EmitUndef16(EmitContext&) {
void EmitSPIRV::EmitUndefU32(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
void EmitSPIRV::EmitUndef32(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}
void EmitSPIRV::EmitUndef64(EmitContext&) {
void EmitSPIRV::EmitUndefU64(EmitContext&) {
throw NotImplementedException("SPIR-V Instruction");
}