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core/debugger: Improved stepping mechanism and misc fixes

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This commit is contained in:
Liam 2022-05-31 14:37:37 -04:00
parent fb4b3c127f
commit 989d4a7a41
16 changed files with 252 additions and 122 deletions
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14
src/core/arm/arm_interface.h
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@ -6,6 +6,9 @@
#include <array>
#include <vector>
#include <dynarmic/interface/halt_reason.h>
#include "common/common_funcs.h"
#include "common/common_types.h"
#include "core/hardware_properties.h"
@ -64,7 +67,7 @@ public:
static_assert(sizeof(ThreadContext64) == 0x320);
/// Runs the CPU until an event happens
virtual void Run() = 0;
void Run();
/// Clear all instruction cache
virtual void ClearInstructionCache() = 0;
@ -191,7 +194,10 @@ public:
void LogBacktrace() const;
bool ShouldStep() const;
static constexpr Dynarmic::HaltReason step_thread = Dynarmic::HaltReason::Step;
static constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2;
static constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3;
static constexpr Dynarmic::HaltReason breakpoint = Dynarmic::HaltReason::UserDefined4;
protected:
/// System context that this ARM interface is running under.
@ -200,6 +206,10 @@ protected:
bool uses_wall_clock;
static void SymbolicateBacktrace(Core::System& system, std::vector<BacktraceEntry>& out);
virtual Dynarmic::HaltReason RunJit() = 0;
virtual Dynarmic::HaltReason StepJit() = 0;
virtual u32 GetSvcNumber() const = 0;
};
} // namespace Core