Mirrors/yuzu
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

shader: Implement POPC

Browse source
This commit is contained in:
ameerj 2021-02-26 21:41:46 -05:00
parent cc55d28949
commit a8c41c50d3
8 changed files with 59 additions and 12 deletions
Download patch file Download diff file Expand all files Collapse all files

8
src/shader_recompiler/frontend/ir/ir_emitter.cpp
View file

@ -808,6 +808,14 @@ U32 IREmitter::BitReverse(const U32& value) {
return Inst<U32>(Opcode::BitReverse32, value);
}
U32 IREmitter::BitCount(const U32& value) {
return Inst<U32>(Opcode::BitCount32, value);
}
U32 IREmitter::BitwiseNot(const U32& a) {
return Inst<U32>(Opcode::BitwiseNot32, a);
}
U1 IREmitter::ILessThan(const U32& lhs, const U32& rhs, bool is_signed) {
return Inst<U1>(is_signed ? Opcode::SLessThan : Opcode::ULessThan, lhs, rhs);
}

2
src/shader_recompiler/frontend/ir/ir_emitter.h
View file

@ -160,6 +160,8 @@ public:
[[nodiscard]] U32 BitFieldExtract(const U32& base, const U32& offset, const U32& count,
bool is_signed);
[[nodiscard]] U32 BitReverse(const U32& value);
[[nodiscard]] U32 BitCount(const U32& value);
[[nodiscard]] U32 BitwiseNot(const U32& a);
[[nodiscard]] U1 ILessThan(const U32& lhs, const U32& rhs, bool is_signed);
[[nodiscard]] U1 IEqual(const U32& lhs, const U32& rhs);

2
src/shader_recompiler/frontend/ir/opcodes.inc
View file

@ -232,6 +232,8 @@ OPCODE(BitFieldInsert, U32, U32,
OPCODE(BitFieldSExtract, U32, U32, U32, U32, )
OPCODE(BitFieldUExtract, U32, U32, U32, U32, )
OPCODE(BitReverse32, U32, U32, )
OPCODE(BitCount32, U32, U32, )
OPCODE(BitwiseNot32, U32, U32, )
OPCODE(SLessThan, U1, U32, U32, )
OPCODE(ULessThan, U1, U32, U32, )