Merge remote-tracking branch 'upstream/master' into nx
# Conflicts: # src/core/CMakeLists.txt # src/core/arm/dynarmic/arm_dynarmic.cpp # src/core/arm/dyncom/arm_dyncom.cpp # src/core/hle/kernel/process.cpp # src/core/hle/kernel/thread.cpp # src/core/hle/kernel/thread.h # src/core/hle/kernel/vm_manager.cpp # src/core/loader/3dsx.cpp # src/core/loader/elf.cpp # src/core/loader/ncch.cpp # src/core/memory.cpp # src/core/memory.h # src/core/memory_setup.h
This commit is contained in:
bunnei
commit
b1d5db1cf6
241 changed files with 20955 additions and 2730 deletions
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@ -16,24 +16,6 @@
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static void InterpreterFallback(u64 pc, Dynarmic::Jit* jit, void* user_arg) {
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UNIMPLEMENTED_MSG("InterpreterFallback for ARM64 JIT does not exist!");
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//ARMul_State* state = static_cast<ARMul_State*>(user_arg);
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//state->Reg = jit->Regs();
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//state->Cpsr = jit->Cpsr();
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//state->Reg[15] = static_cast<u32>(pc);
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//state->ExtReg = jit->ExtRegs();
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//state->VFP[VFP_FPSCR] = jit->Fpscr();
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//state->NumInstrsToExecute = 1;
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//InterpreterMainLoop(state);
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//bool is_thumb = (state->Cpsr & (1 << 5)) != 0;
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//state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
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//jit->Regs() = state->Reg;
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//jit->Cpsr() = state->Cpsr;
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//jit->ExtRegs() = state->ExtReg;
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//jit->SetFpscr(state->VFP[VFP_FPSCR]);
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}
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static bool IsReadOnlyMemory(u64 vaddr) {
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@ -73,11 +55,10 @@ void MemoryWrite64(const u64 addr, const u64 data) {
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Memory::Write64(static_cast<VAddr>(addr), data);
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}
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static Dynarmic::UserCallbacks GetUserCallbacks(
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const std::shared_ptr<ARMul_State>& interpeter_state) {
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static Dynarmic::UserCallbacks GetUserCallbacks(ARM_Dynarmic* this_) {
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Dynarmic::UserCallbacks user_callbacks{};
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//user_callbacks.InterpreterFallback = &InterpreterFallback;
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//user_callbacks.user_arg = static_cast<void*>(interpeter_state.get());
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user_callbacks.InterpreterFallback = &InterpreterFallback;
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user_callbacks.user_arg = static_cast<void*>(this_);
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user_callbacks.CallSVC = &SVC::CallSVC;
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user_callbacks.memory.IsReadOnlyMemory = &IsReadOnlyMemory;
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user_callbacks.memory.ReadCode = &MemoryRead32;
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@ -90,13 +71,13 @@ static Dynarmic::UserCallbacks GetUserCallbacks(
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user_callbacks.memory.Write32 = &MemoryWrite32;
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user_callbacks.memory.Write64 = &MemoryWrite64;
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//user_callbacks.page_table = Memory::GetCurrentPageTablePointers();
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user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state);
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return user_callbacks;
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}
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ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) {
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interpreter_state = std::make_shared<ARMul_State>(initial_mode);
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jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state), Dynarmic::Arch::ARM64);
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}
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void ARM_Dynarmic::MapBackingMemory(VAddr address, size_t size, u8* memory, Kernel::VMAPermission perms) {
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}
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void ARM_Dynarmic::SetPC(u64 pc) {
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@ -115,30 +96,26 @@ void ARM_Dynarmic::SetReg(int index, u64 value) {
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jit->Regs64()[index] = value;
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}
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const u128& ARM_Dynarmic::GetExtReg(int index) const {
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return jit->ExtRegs64()[index];
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}
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void ARM_Dynarmic::SetExtReg(int index, u128& value) {
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jit->ExtRegs64()[index] = value;
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}
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u32 ARM_Dynarmic::GetVFPReg(int index) const {
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return jit->ExtRegs()[index];
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return {};
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}
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void ARM_Dynarmic::SetVFPReg(int index, u32 value) {
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jit->ExtRegs()[index] = value;
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}
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u32 ARM_Dynarmic::GetVFPSystemReg(VFPSystemRegister reg) const {
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if (reg == VFP_FPSCR) {
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return jit->Fpscr();
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}
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// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
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return interpreter_state->VFP[reg];
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return {};
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}
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void ARM_Dynarmic::SetVFPSystemReg(VFPSystemRegister reg, u32 value) {
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if (reg == VFP_FPSCR) {
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jit->SetFpscr(value);
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}
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// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
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interpreter_state->VFP[reg] = value;
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}
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u32 ARM_Dynarmic::GetCPSR() const {
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@ -150,11 +127,10 @@ void ARM_Dynarmic::SetCPSR(u32 cpsr) {
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}
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u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) {
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return interpreter_state->CP15[reg];
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return {};
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}
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void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
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interpreter_state->CP15[reg] = value;
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}
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VAddr ARM_Dynarmic::GetTlsAddress() const {
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@ -165,51 +141,39 @@ void ARM_Dynarmic::SetTlsAddress(VAddr address) {
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jit->TlsAddr() = address;
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}
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void ARM_Dynarmic::AddTicks(u64 ticks) {
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down_count -= ticks;
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if (down_count < 0) {
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CoreTiming::Advance();
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}
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}
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MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
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void ARM_Dynarmic::ExecuteInstructions(int num_instructions) {
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ASSERT(Memory::GetCurrentPageTable() == current_page_table);
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MICROPROFILE_SCOPE(ARM_Jit);
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unsigned ticks_executed = jit->Run(1 /*static_cast<unsigned>(num_instructions)*/);
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std::size_t ticks_executed = jit->Run(static_cast<unsigned>(num_instructions));
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AddTicks(ticks_executed);
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CoreTiming::AddTicks(ticks_executed);
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}
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void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& ctx) {
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memcpy(ctx.cpu_registers, jit->Regs64().data(), sizeof(ctx.cpu_registers));
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//memcpy(ctx.fpu_registers, jit->ExtRegs().data(), sizeof(ctx.fpu_registers));
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memcpy(ctx.fpu_registers, jit->ExtRegs64().data(), sizeof(ctx.fpu_registers));
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ctx.lr = jit->Regs64()[30];
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ctx.sp = jit->Regs64()[31];
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ctx.pc = jit->Regs64()[32];
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ctx.cpsr = jit->Cpsr();
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ctx.fpscr = jit->Fpscr();
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ctx.fpexc = interpreter_state->VFP[VFP_FPEXC];
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// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
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ctx.tls_address = jit->TlsAddr();
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}
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void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& ctx) {
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memcpy(jit->Regs64().data(), ctx.cpu_registers, sizeof(ctx.cpu_registers));
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//memcpy(jit->ExtRegs().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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memcpy(jit->ExtRegs64().data(), ctx.fpu_registers, sizeof(ctx.fpu_registers));
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jit->Regs64()[30] = ctx.lr;
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jit->Regs64()[31] = ctx.sp;
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jit->Regs64()[32] = ctx.pc;
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jit->Cpsr() = ctx.cpsr;
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jit->SetFpscr(ctx.fpscr);
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interpreter_state->VFP[VFP_FPEXC] = ctx.fpexc;
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// TODO(bunnei): Fix once we have proper support for tpidrro_el0, etc. in the JIT
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jit->TlsAddr() = ctx.tls_address;
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}
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@ -223,3 +187,16 @@ void ARM_Dynarmic::PrepareReschedule() {
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void ARM_Dynarmic::ClearInstructionCache() {
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jit->ClearCache();
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}
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void ARM_Dynarmic::PageTableChanged() {
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current_page_table = Memory::GetCurrentPageTable();
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auto iter = jits.find(current_page_table);
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if (iter != jits.end()) {
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jit = iter->second.get();
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return;
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}
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jit = new Dynarmic::Jit(GetUserCallbacks(this), Dynarmic::Arch::ARM64);
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jits.emplace(current_page_table, std::unique_ptr<Dynarmic::Jit>(jit));
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}
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@ -4,20 +4,29 @@
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#pragma once
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#include <map>
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#include <memory>
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#include <dynarmic/dynarmic.h>
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#include "common/common_types.h"
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#include "core/arm/arm_interface.h"
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#include "core/arm/skyeye_common/armstate.h"
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namespace Memory {
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struct PageTable;
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} // namespace Memory
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class ARM_Dynarmic final : public ARM_Interface {
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public:
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ARM_Dynarmic(PrivilegeMode initial_mode);
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void MapBackingMemory(VAddr address, size_t size, u8* memory, Kernel::VMAPermission perms) override;
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void SetPC(u64 pc) override;
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u64 GetPC() const override;
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u64 GetReg(int index) const override;
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void SetReg(int index, u64 value) override;
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const u128& GetExtReg(int index) const override;
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void SetExtReg(int index, u128& value) override;
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u32 GetVFPReg(int index) const override;
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void SetVFPReg(int index, u32 value) override;
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u32 GetVFPSystemReg(VFPSystemRegister reg) const override;
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@ -29,8 +38,6 @@ public:
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VAddr GetTlsAddress() const override;
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void SetTlsAddress(VAddr address) override;
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void AddTicks(u64 ticks) override;
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void SaveContext(ThreadContext& ctx) override;
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void LoadContext(const ThreadContext& ctx) override;
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@ -38,8 +45,10 @@ public:
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void ExecuteInstructions(int num_instructions) override;
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void ClearInstructionCache() override;
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void PageTableChanged() override;
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private:
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std::unique_ptr<Dynarmic::Jit> jit;
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std::shared_ptr<ARMul_State> interpreter_state;
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Dynarmic::Jit* jit = nullptr;
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Memory::PageTable* current_page_table = nullptr;
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std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::Jit>> jits;
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};
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