spirv: Initial bindings support
This commit is contained in:
ReinUsesLisp
ameerj
parent
d5d468cf2c
commit
b5d7279d87
23 changed files with 679 additions and 300 deletions
160
src/shader_recompiler/backend/spirv/emit_context.cpp
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160
src/shader_recompiler/backend/spirv/emit_context.cpp
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@ -0,0 +1,160 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <algorithm>
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#include <array>
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#include <string_view>
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#include <fmt/format.h>
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#include "common/common_types.h"
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#include "shader_recompiler/backend/spirv/emit_context.h"
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namespace Shader::Backend::SPIRV {
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void VectorTypes::Define(Sirit::Module& sirit_ctx, Id base_type, std::string_view name) {
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defs[0] = sirit_ctx.Name(base_type, name);
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std::array<char, 6> def_name;
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for (int i = 1; i < 4; ++i) {
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const std::string_view def_name_view(
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def_name.data(),
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fmt::format_to_n(def_name.data(), def_name.size(), "{}x{}", name, i + 1).size);
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defs[i] = sirit_ctx.Name(sirit_ctx.TypeVector(base_type, i + 1), def_name_view);
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}
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}
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EmitContext::EmitContext(IR::Program& program) : Sirit::Module(0x00010000) {
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AddCapability(spv::Capability::Shader);
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DefineCommonTypes(program.info);
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DefineCommonConstants();
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DefineSpecialVariables(program.info);
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DefineConstantBuffers(program.info);
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DefineStorageBuffers(program.info);
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DefineLabels(program);
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}
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EmitContext::~EmitContext() = default;
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Id EmitContext::Def(const IR::Value& value) {
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if (!value.IsImmediate()) {
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return value.Inst()->Definition<Id>();
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}
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switch (value.Type()) {
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case IR::Type::U1:
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return value.U1() ? true_value : false_value;
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case IR::Type::U32:
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return Constant(U32[1], value.U32());
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case IR::Type::F32:
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return Constant(F32[1], value.F32());
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default:
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throw NotImplementedException("Immediate type {}", value.Type());
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}
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}
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void EmitContext::DefineCommonTypes(const Info& info) {
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void_id = TypeVoid();
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U1 = Name(TypeBool(), "u1");
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F32.Define(*this, TypeFloat(32), "f32");
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U32.Define(*this, TypeInt(32, false), "u32");
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if (info.uses_fp16) {
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AddCapability(spv::Capability::Float16);
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F16.Define(*this, TypeFloat(16), "f16");
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}
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if (info.uses_fp64) {
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AddCapability(spv::Capability::Float64);
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F64.Define(*this, TypeFloat(64), "f64");
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}
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}
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void EmitContext::DefineCommonConstants() {
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true_value = ConstantTrue(U1);
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false_value = ConstantFalse(U1);
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u32_zero_value = Constant(U32[1], 0U);
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}
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void EmitContext::DefineSpecialVariables(const Info& info) {
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const auto define{[this](Id type, spv::BuiltIn builtin, spv::StorageClass storage_class) {
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const Id pointer_type{TypePointer(storage_class, type)};
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const Id id{AddGlobalVariable(pointer_type, spv::StorageClass::Input)};
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Decorate(id, spv::Decoration::BuiltIn, builtin);
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return id;
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}};
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using namespace std::placeholders;
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const auto define_input{std::bind(define, _1, _2, spv::StorageClass::Input)};
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if (info.uses_workgroup_id) {
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workgroup_id = define_input(U32[3], spv::BuiltIn::WorkgroupId);
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}
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if (info.uses_local_invocation_id) {
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local_invocation_id = define_input(U32[3], spv::BuiltIn::LocalInvocationId);
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}
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}
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void EmitContext::DefineConstantBuffers(const Info& info) {
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if (info.constant_buffer_descriptors.empty()) {
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return;
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}
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const Id array_type{TypeArray(U32[1], Constant(U32[1], 4096))};
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Decorate(array_type, spv::Decoration::ArrayStride, 16U);
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const Id struct_type{TypeStruct(array_type)};
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Name(struct_type, "cbuf_block");
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Decorate(struct_type, spv::Decoration::Block);
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MemberName(struct_type, 0, "data");
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MemberDecorate(struct_type, 0, spv::Decoration::Offset, 0U);
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const Id uniform_type{TypePointer(spv::StorageClass::Uniform, struct_type)};
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uniform_u32 = TypePointer(spv::StorageClass::Uniform, U32[1]);
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u32 binding{};
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for (const Info::ConstantBufferDescriptor& desc : info.constant_buffer_descriptors) {
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const Id id{AddGlobalVariable(uniform_type, spv::StorageClass::Uniform)};
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Decorate(id, spv::Decoration::Binding, binding);
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Name(id, fmt::format("c{}", desc.index));
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std::fill_n(cbufs.data() + desc.index, desc.count, id);
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binding += desc.count;
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}
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}
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void EmitContext::DefineStorageBuffers(const Info& info) {
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if (info.storage_buffers_descriptors.empty()) {
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return;
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}
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AddExtension("SPV_KHR_storage_buffer_storage_class");
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const Id array_type{TypeRuntimeArray(U32[1])};
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Decorate(array_type, spv::Decoration::ArrayStride, 4U);
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const Id struct_type{TypeStruct(array_type)};
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Name(struct_type, "ssbo_block");
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Decorate(struct_type, spv::Decoration::Block);
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MemberName(struct_type, 0, "data");
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MemberDecorate(struct_type, 0, spv::Decoration::Offset, 0U);
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const Id storage_type{TypePointer(spv::StorageClass::StorageBuffer, struct_type)};
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storage_u32 = TypePointer(spv::StorageClass::StorageBuffer, U32[1]);
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u32 binding{};
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for (const Info::StorageBufferDescriptor& desc : info.storage_buffers_descriptors) {
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const Id id{AddGlobalVariable(storage_type, spv::StorageClass::StorageBuffer)};
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Decorate(id, spv::Decoration::Binding, binding);
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Name(id, fmt::format("ssbo{}", binding));
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std::fill_n(ssbos.data() + binding, desc.count, id);
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binding += desc.count;
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}
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}
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void EmitContext::DefineLabels(IR::Program& program) {
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for (const IR::Function& function : program.functions) {
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for (IR::Block* const block : function.blocks) {
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block->SetDefinition(OpLabel());
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}
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}
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}
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} // namespace Shader::Backend::SPIRV
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67
src/shader_recompiler/backend/spirv/emit_context.h
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67
src/shader_recompiler/backend/spirv/emit_context.h
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@ -0,0 +1,67 @@
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <array>
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#include <string_view>
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#include <sirit/sirit.h>
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#include "shader_recompiler/frontend/ir/program.h"
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#include "shader_recompiler/shader_info.h"
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namespace Shader::Backend::SPIRV {
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using Sirit::Id;
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class VectorTypes {
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public:
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void Define(Sirit::Module& sirit_ctx, Id base_type, std::string_view name);
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[[nodiscard]] Id operator[](size_t size) const noexcept {
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return defs[size - 1];
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}
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private:
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std::array<Id, 4> defs{};
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};
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class EmitContext final : public Sirit::Module {
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public:
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explicit EmitContext(IR::Program& program);
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~EmitContext();
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[[nodiscard]] Id Def(const IR::Value& value);
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Id void_id{};
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Id U1{};
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VectorTypes F32;
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VectorTypes U32;
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VectorTypes F16;
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VectorTypes F64;
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Id true_value{};
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Id false_value{};
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Id u32_zero_value{};
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Id uniform_u32{};
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Id storage_u32{};
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std::array<Id, Info::MAX_CBUFS> cbufs{};
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std::array<Id, Info::MAX_SSBOS> ssbos{};
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Id workgroup_id{};
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Id local_invocation_id{};
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private:
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void DefineCommonTypes(const Info& info);
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void DefineCommonConstants();
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void DefineSpecialVariables(const Info& info);
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void DefineConstantBuffers(const Info& info);
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void DefineStorageBuffers(const Info& info);
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void DefineLabels(IR::Program& program);
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};
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} // namespace Shader::Backend::SPIRV
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@ -12,60 +12,22 @@
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#include "shader_recompiler/frontend/ir/program.h"
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namespace Shader::Backend::SPIRV {
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namespace {
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template <class Func>
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struct FuncTraits : FuncTraits<decltype(&Func::operator())> {};
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EmitContext::EmitContext(IR::Program& program) {
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AddCapability(spv::Capability::Shader);
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AddCapability(spv::Capability::Float16);
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AddCapability(spv::Capability::Float64);
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void_id = TypeVoid();
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template <class ClassType, class ReturnType_, class... Args>
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struct FuncTraits<ReturnType_ (ClassType::*)(Args...)> {
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using ReturnType = ReturnType_;
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u1 = Name(TypeBool(), "u1");
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f32.Define(*this, TypeFloat(32), "f32");
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u32.Define(*this, TypeInt(32, false), "u32");
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f16.Define(*this, TypeFloat(16), "f16");
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f64.Define(*this, TypeFloat(64), "f64");
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static constexpr size_t NUM_ARGS = sizeof...(Args);
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true_value = ConstantTrue(u1);
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false_value = ConstantFalse(u1);
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for (const IR::Function& function : program.functions) {
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for (IR::Block* const block : function.blocks) {
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block_label_map.emplace_back(block, OpLabel());
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}
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}
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std::ranges::sort(block_label_map, {}, &std::pair<IR::Block*, Id>::first);
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}
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EmitContext::~EmitContext() = default;
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EmitSPIRV::EmitSPIRV(IR::Program& program) {
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EmitContext ctx{program};
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const Id void_function{ctx.TypeFunction(ctx.void_id)};
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// FIXME: Forward declare functions (needs sirit support)
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Id func{};
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for (IR::Function& function : program.functions) {
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func = ctx.OpFunction(ctx.void_id, spv::FunctionControlMask::MaskNone, void_function);
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for (IR::Block* const block : function.blocks) {
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ctx.AddLabel(ctx.BlockLabel(block));
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for (IR::Inst& inst : block->Instructions()) {
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EmitInst(ctx, &inst);
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}
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}
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ctx.OpFunctionEnd();
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}
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ctx.AddEntryPoint(spv::ExecutionModel::GLCompute, func, "main");
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std::vector<u32> result{ctx.Assemble()};
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std::FILE* file{std::fopen("shader.spv", "wb")};
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std::fwrite(result.data(), sizeof(u32), result.size(), file);
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std::fclose(file);
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std::system("spirv-dis shader.spv");
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std::system("spirv-val shader.spv");
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std::system("spirv-cross shader.spv");
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}
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template <size_t I>
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using ArgType = std::tuple_element_t<I, std::tuple<Args...>>;
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};
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template <auto method, typename... Args>
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static void SetDefinition(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst, Args... args) {
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void SetDefinition(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst, Args... args) {
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const Id forward_id{inst->Definition<Id>()};
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const bool has_forward_id{Sirit::ValidId(forward_id)};
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Id current_id{};
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@ -80,42 +42,90 @@ static void SetDefinition(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst, Arg
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}
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}
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template <auto method>
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static void Invoke(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst) {
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using M = decltype(method);
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using std::is_invocable_r_v;
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if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&>) {
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SetDefinition<method>(emit, ctx, inst);
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, Id>) {
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SetDefinition<method>(emit, ctx, inst, ctx.Def(inst->Arg(0)));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, Id, Id>) {
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SetDefinition<method>(emit, ctx, inst, ctx.Def(inst->Arg(0)), ctx.Def(inst->Arg(1)));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, Id, Id, Id>) {
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SetDefinition<method>(emit, ctx, inst, ctx.Def(inst->Arg(0)), ctx.Def(inst->Arg(1)),
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ctx.Def(inst->Arg(2)));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, IR::Inst*>) {
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SetDefinition<method>(emit, ctx, inst, inst);
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, IR::Inst*, Id, Id>) {
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SetDefinition<method>(emit, ctx, inst, inst, ctx.Def(inst->Arg(0)), ctx.Def(inst->Arg(1)));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, IR::Inst*, Id, Id, Id>) {
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SetDefinition<method>(emit, ctx, inst, inst, ctx.Def(inst->Arg(0)), ctx.Def(inst->Arg(1)),
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ctx.Def(inst->Arg(2)));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, Id, u32>) {
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SetDefinition<method>(emit, ctx, inst, ctx.Def(inst->Arg(0)), inst->Arg(1).U32());
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, const IR::Value&>) {
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SetDefinition<method>(emit, ctx, inst, inst->Arg(0));
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} else if constexpr (is_invocable_r_v<Id, M, EmitSPIRV&, EmitContext&, const IR::Value&,
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const IR::Value&>) {
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SetDefinition<method>(emit, ctx, inst, inst->Arg(0), inst->Arg(1));
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} else if constexpr (is_invocable_r_v<void, M, EmitSPIRV&, EmitContext&, IR::Inst*>) {
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(emit.*method)(ctx, inst);
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} else if constexpr (is_invocable_r_v<void, M, EmitSPIRV&, EmitContext&>) {
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(emit.*method)(ctx);
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} else {
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static_assert(false, "Bad format");
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template <typename ArgType>
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ArgType Arg(EmitContext& ctx, const IR::Value& arg) {
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if constexpr (std::is_same_v<ArgType, Id>) {
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return ctx.Def(arg);
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} else if constexpr (std::is_same_v<ArgType, const IR::Value&>) {
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return arg;
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} else if constexpr (std::is_same_v<ArgType, u32>) {
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return arg.U32();
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} else if constexpr (std::is_same_v<ArgType, IR::Block*>) {
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return arg.Label();
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}
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}
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template <auto method, bool is_first_arg_inst, size_t... I>
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void Invoke(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst, std::index_sequence<I...>) {
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using Traits = FuncTraits<decltype(method)>;
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if constexpr (std::is_same_v<Traits::ReturnType, Id>) {
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if constexpr (is_first_arg_inst) {
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SetDefinition<method>(emit, ctx, inst, inst,
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Arg<Traits::ArgType<I + 2>>(ctx, inst->Arg(I))...);
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} else {
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SetDefinition<method>(emit, ctx, inst,
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Arg<Traits::ArgType<I + 1>>(ctx, inst->Arg(I))...);
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}
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} else {
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if constexpr (is_first_arg_inst) {
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(emit.*method)(ctx, inst, Arg<Traits::ArgType<I + 2>>(ctx, inst->Arg(I))...);
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} else {
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(emit.*method)(ctx, Arg<Traits::ArgType<I + 1>>(ctx, inst->Arg(I))...);
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}
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}
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}
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template <auto method>
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void Invoke(EmitSPIRV& emit, EmitContext& ctx, IR::Inst* inst) {
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using Traits = FuncTraits<decltype(method)>;
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static_assert(Traits::NUM_ARGS >= 1, "Insufficient arguments");
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if constexpr (Traits::NUM_ARGS == 1) {
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Invoke<method, false>(emit, ctx, inst, std::make_index_sequence<0>{});
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} else {
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using FirstArgType = typename Traits::template ArgType<1>;
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static constexpr bool is_first_arg_inst = std::is_same_v<FirstArgType, IR::Inst*>;
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using Indices = std::make_index_sequence<Traits::NUM_ARGS - (is_first_arg_inst ? 2 : 1)>;
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Invoke<method, is_first_arg_inst>(emit, ctx, inst, Indices{});
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}
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}
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} // Anonymous namespace
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EmitSPIRV::EmitSPIRV(IR::Program& program) {
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EmitContext ctx{program};
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const Id void_function{ctx.TypeFunction(ctx.void_id)};
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// FIXME: Forward declare functions (needs sirit support)
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Id func{};
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for (IR::Function& function : program.functions) {
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func = ctx.OpFunction(ctx.void_id, spv::FunctionControlMask::MaskNone, void_function);
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for (IR::Block* const block : function.blocks) {
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ctx.AddLabel(block->Definition<Id>());
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for (IR::Inst& inst : block->Instructions()) {
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EmitInst(ctx, &inst);
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}
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}
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ctx.OpFunctionEnd();
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}
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boost::container::small_vector<Id, 32> interfaces;
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if (program.info.uses_workgroup_id) {
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interfaces.push_back(ctx.workgroup_id);
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}
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if (program.info.uses_local_invocation_id) {
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interfaces.push_back(ctx.local_invocation_id);
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||||
}
|
||||
|
||||
const std::span interfaces_span(interfaces.data(), interfaces.size());
|
||||
ctx.AddEntryPoint(spv::ExecutionModel::Fragment, func, "main", interfaces_span);
|
||||
ctx.AddExecutionMode(func, spv::ExecutionMode::OriginUpperLeft);
|
||||
|
||||
std::vector<u32> result{ctx.Assemble()};
|
||||
std::FILE* file{std::fopen("D:\\shader.spv", "wb")};
|
||||
std::fwrite(result.data(), sizeof(u32), result.size(), file);
|
||||
std::fclose(file);
|
||||
std::system("spirv-dis D:\\shader.spv") == 0 &&
|
||||
std::system("spirv-val --uniform-buffer-standard-layout D:\\shader.spv") == 0 &&
|
||||
std::system("spirv-cross -V D:\\shader.spv") == 0;
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitInst(EmitContext& ctx, IR::Inst* inst) {
|
||||
switch (inst->Opcode()) {
|
||||
#define OPCODE(name, result_type, ...) \
|
||||
|
|
@ -130,9 +140,9 @@ void EmitSPIRV::EmitInst(EmitContext& ctx, IR::Inst* inst) {
|
|||
static Id TypeId(const EmitContext& ctx, IR::Type type) {
|
||||
switch (type) {
|
||||
case IR::Type::U1:
|
||||
return ctx.u1;
|
||||
return ctx.U1;
|
||||
case IR::Type::U32:
|
||||
return ctx.u32[1];
|
||||
return ctx.U32[1];
|
||||
default:
|
||||
throw NotImplementedException("Phi node type {}", type);
|
||||
}
|
||||
|
|
@ -162,7 +172,7 @@ Id EmitSPIRV::EmitPhi(EmitContext& ctx, IR::Inst* inst) {
|
|||
}
|
||||
IR::Block* const phi_block{inst->PhiBlock(index)};
|
||||
operands.push_back(def);
|
||||
operands.push_back(ctx.BlockLabel(phi_block));
|
||||
operands.push_back(phi_block->Definition<Id>());
|
||||
}
|
||||
const Id result_type{TypeId(ctx, inst->Arg(0).Type())};
|
||||
return ctx.OpPhi(result_type, std::span(operands.data(), operands.size()));
|
||||
|
|
@ -174,29 +184,6 @@ void EmitSPIRV::EmitIdentity(EmitContext&) {
|
|||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
// FIXME: Move to its own file
|
||||
void EmitSPIRV::EmitBranch(EmitContext& ctx, IR::Inst* inst) {
|
||||
ctx.OpBranch(ctx.BlockLabel(inst->Arg(0).Label()));
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitBranchConditional(EmitContext& ctx, IR::Inst* inst) {
|
||||
ctx.OpBranchConditional(ctx.Def(inst->Arg(0)), ctx.BlockLabel(inst->Arg(1).Label()),
|
||||
ctx.BlockLabel(inst->Arg(2).Label()));
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitLoopMerge(EmitContext& ctx, IR::Inst* inst) {
|
||||
ctx.OpLoopMerge(ctx.BlockLabel(inst->Arg(0).Label()), ctx.BlockLabel(inst->Arg(1).Label()),
|
||||
spv::LoopControlMask::MaskNone);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitSelectionMerge(EmitContext& ctx, IR::Inst* inst) {
|
||||
ctx.OpSelectionMerge(ctx.BlockLabel(inst->Arg(0).Label()), spv::SelectionControlMask::MaskNone);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitReturn(EmitContext& ctx) {
|
||||
ctx.OpReturn();
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitGetZeroFromOp(EmitContext&) {
|
||||
throw LogicError("Unreachable instruction");
|
||||
}
|
||||
|
|
|
|||
|
|
@ -7,82 +7,12 @@
|
|||
#include <sirit/sirit.h>
|
||||
|
||||
#include "common/common_types.h"
|
||||
#include "shader_recompiler/backend/spirv/emit_context.h"
|
||||
#include "shader_recompiler/frontend/ir/microinstruction.h"
|
||||
#include "shader_recompiler/frontend/ir/program.h"
|
||||
|
||||
namespace Shader::Backend::SPIRV {
|
||||
|
||||
using Sirit::Id;
|
||||
|
||||
class VectorTypes {
|
||||
public:
|
||||
void Define(Sirit::Module& sirit_ctx, Id base_type, std::string_view name) {
|
||||
defs[0] = sirit_ctx.Name(base_type, name);
|
||||
|
||||
std::array<char, 6> def_name;
|
||||
for (int i = 1; i < 4; ++i) {
|
||||
const std::string_view def_name_view(
|
||||
def_name.data(),
|
||||
fmt::format_to_n(def_name.data(), def_name.size(), "{}x{}", name, i + 1).size);
|
||||
defs[i] = sirit_ctx.Name(sirit_ctx.TypeVector(base_type, i + 1), def_name_view);
|
||||
}
|
||||
}
|
||||
|
||||
[[nodiscard]] Id operator[](size_t size) const noexcept {
|
||||
return defs[size - 1];
|
||||
}
|
||||
|
||||
private:
|
||||
std::array<Id, 4> defs;
|
||||
};
|
||||
|
||||
class EmitContext final : public Sirit::Module {
|
||||
public:
|
||||
explicit EmitContext(IR::Program& program);
|
||||
~EmitContext();
|
||||
|
||||
[[nodiscard]] Id Def(const IR::Value& value) {
|
||||
if (!value.IsImmediate()) {
|
||||
return value.Inst()->Definition<Id>();
|
||||
}
|
||||
switch (value.Type()) {
|
||||
case IR::Type::U1:
|
||||
return value.U1() ? true_value : false_value;
|
||||
case IR::Type::U32:
|
||||
return Constant(u32[1], value.U32());
|
||||
case IR::Type::F32:
|
||||
return Constant(f32[1], value.F32());
|
||||
default:
|
||||
throw NotImplementedException("Immediate type {}", value.Type());
|
||||
}
|
||||
}
|
||||
|
||||
[[nodiscard]] Id BlockLabel(IR::Block* block) const {
|
||||
const auto it{std::ranges::lower_bound(block_label_map, block, {},
|
||||
&std::pair<IR::Block*, Id>::first)};
|
||||
if (it == block_label_map.end()) {
|
||||
throw LogicError("Undefined block");
|
||||
}
|
||||
return it->second;
|
||||
}
|
||||
|
||||
Id void_id{};
|
||||
Id u1{};
|
||||
VectorTypes f32;
|
||||
VectorTypes u32;
|
||||
VectorTypes f16;
|
||||
VectorTypes f64;
|
||||
|
||||
Id true_value{};
|
||||
Id false_value{};
|
||||
|
||||
Id workgroup_id{};
|
||||
Id local_invocation_id{};
|
||||
|
||||
private:
|
||||
std::vector<std::pair<IR::Block*, Id>> block_label_map;
|
||||
};
|
||||
|
||||
class EmitSPIRV {
|
||||
public:
|
||||
explicit EmitSPIRV(IR::Program& program);
|
||||
|
|
@ -94,10 +24,11 @@ private:
|
|||
Id EmitPhi(EmitContext& ctx, IR::Inst* inst);
|
||||
void EmitVoid(EmitContext& ctx);
|
||||
void EmitIdentity(EmitContext& ctx);
|
||||
void EmitBranch(EmitContext& ctx, IR::Inst* inst);
|
||||
void EmitBranchConditional(EmitContext& ctx, IR::Inst* inst);
|
||||
void EmitLoopMerge(EmitContext& ctx, IR::Inst* inst);
|
||||
void EmitSelectionMerge(EmitContext& ctx, IR::Inst* inst);
|
||||
void EmitBranch(EmitContext& ctx, IR::Block* label);
|
||||
void EmitBranchConditional(EmitContext& ctx, Id condition, IR::Block* true_label,
|
||||
IR::Block* false_label);
|
||||
void EmitLoopMerge(EmitContext& ctx, IR::Block* merge_label, IR::Block* continue_label);
|
||||
void EmitSelectionMerge(EmitContext& ctx, IR::Block* merge_label);
|
||||
void EmitReturn(EmitContext& ctx);
|
||||
void EmitGetRegister(EmitContext& ctx);
|
||||
void EmitSetRegister(EmitContext& ctx);
|
||||
|
|
@ -150,7 +81,8 @@ private:
|
|||
void EmitWriteStorageS8(EmitContext& ctx);
|
||||
void EmitWriteStorageU16(EmitContext& ctx);
|
||||
void EmitWriteStorageS16(EmitContext& ctx);
|
||||
void EmitWriteStorage32(EmitContext& ctx);
|
||||
void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset,
|
||||
Id value);
|
||||
void EmitWriteStorage64(EmitContext& ctx);
|
||||
void EmitWriteStorage128(EmitContext& ctx);
|
||||
void EmitCompositeConstructU32x2(EmitContext& ctx);
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ void EmitSPIRV::EmitBitCastU16F16(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitBitCastU32F32(EmitContext& ctx, Id value) {
|
||||
return ctx.OpBitcast(ctx.u32[1], value);
|
||||
return ctx.OpBitcast(ctx.U32[1], value);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitBitCastU64F64(EmitContext&) {
|
||||
|
|
@ -23,7 +23,7 @@ void EmitSPIRV::EmitBitCastF16U16(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitBitCastF32U32(EmitContext& ctx, Id value) {
|
||||
return ctx.OpBitcast(ctx.f32[1], value);
|
||||
return ctx.OpBitcast(ctx.F32[1], value);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitBitCastF64U64(EmitContext&) {
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@ void EmitSPIRV::EmitCompositeExtractU32x2(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitCompositeExtractU32x3(EmitContext& ctx, Id vector, u32 index) {
|
||||
return ctx.OpCompositeExtract(ctx.u32[1], vector, index);
|
||||
return ctx.OpCompositeExtract(ctx.U32[1], vector, index);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitCompositeExtractU32x4(EmitContext&) {
|
||||
|
|
|
|||
|
|
@ -37,7 +37,10 @@ Id EmitSPIRV::EmitGetCbuf(EmitContext& ctx, const IR::Value& binding, const IR::
|
|||
if (!offset.IsImmediate()) {
|
||||
throw NotImplementedException("Variable constant buffer offset");
|
||||
}
|
||||
return ctx.Name(ctx.OpUndef(ctx.u32[1]), "unimplemented_cbuf");
|
||||
const Id imm_offset{ctx.Constant(ctx.U32[1], offset.U32() / 4)};
|
||||
const Id cbuf{ctx.cbufs[binding.U32()]};
|
||||
const Id access_chain{ctx.OpAccessChain(ctx.uniform_u32, cbuf, ctx.u32_zero_value, imm_offset)};
|
||||
return ctx.OpLoad(ctx.U32[1], access_chain);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitGetAttribute(EmitContext&) {
|
||||
|
|
@ -89,22 +92,11 @@ void EmitSPIRV::EmitSetOFlag(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitWorkgroupId(EmitContext& ctx) {
|
||||
if (ctx.workgroup_id.value == 0) {
|
||||
ctx.workgroup_id = ctx.AddGlobalVariable(
|
||||
ctx.TypePointer(spv::StorageClass::Input, ctx.u32[3]), spv::StorageClass::Input);
|
||||
ctx.Decorate(ctx.workgroup_id, spv::Decoration::BuiltIn, spv::BuiltIn::WorkgroupId);
|
||||
}
|
||||
return ctx.OpLoad(ctx.u32[3], ctx.workgroup_id);
|
||||
return ctx.OpLoad(ctx.U32[3], ctx.workgroup_id);
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitLocalInvocationId(EmitContext& ctx) {
|
||||
if (ctx.local_invocation_id.value == 0) {
|
||||
ctx.local_invocation_id = ctx.AddGlobalVariable(
|
||||
ctx.TypePointer(spv::StorageClass::Input, ctx.u32[3]), spv::StorageClass::Input);
|
||||
ctx.Decorate(ctx.local_invocation_id, spv::Decoration::BuiltIn,
|
||||
spv::BuiltIn::LocalInvocationId);
|
||||
}
|
||||
return ctx.OpLoad(ctx.u32[3], ctx.local_invocation_id);
|
||||
return ctx.OpLoad(ctx.U32[3], ctx.local_invocation_id);
|
||||
}
|
||||
|
||||
} // namespace Shader::Backend::SPIRV
|
||||
|
|
|
|||
|
|
@ -3,3 +3,29 @@
|
|||
// Refer to the license.txt file included.
|
||||
|
||||
#include "shader_recompiler/backend/spirv/emit_spirv.h"
|
||||
|
||||
namespace Shader::Backend::SPIRV {
|
||||
|
||||
void EmitSPIRV::EmitBranch(EmitContext& ctx, IR::Block* label) {
|
||||
ctx.OpBranch(label->Definition<Id>());
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitBranchConditional(EmitContext& ctx, Id condition, IR::Block* true_label,
|
||||
IR::Block* false_label) {
|
||||
ctx.OpBranchConditional(condition, true_label->Definition<Id>(), false_label->Definition<Id>());
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitLoopMerge(EmitContext& ctx, IR::Block* merge_label, IR::Block* continue_label) {
|
||||
ctx.OpLoopMerge(merge_label->Definition<Id>(), continue_label->Definition<Id>(),
|
||||
spv::LoopControlMask::MaskNone);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitSelectionMerge(EmitContext& ctx, IR::Block* merge_label) {
|
||||
ctx.OpSelectionMerge(merge_label->Definition<Id>(), spv::SelectionControlMask::MaskNone);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitReturn(EmitContext& ctx) {
|
||||
ctx.OpReturn();
|
||||
}
|
||||
|
||||
} // namespace Shader::Backend::SPIRV
|
||||
|
|
|
|||
|
|
@ -46,27 +46,27 @@ void EmitSPIRV::EmitFPAbs64(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitFPAdd16(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
|
||||
return Decorate(ctx, inst, ctx.OpFAdd(ctx.f16[1], a, b));
|
||||
return Decorate(ctx, inst, ctx.OpFAdd(ctx.F16[1], a, b));
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitFPAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
|
||||
return Decorate(ctx, inst, ctx.OpFAdd(ctx.f32[1], a, b));
|
||||
return Decorate(ctx, inst, ctx.OpFAdd(ctx.F32[1], a, b));
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitFPAdd64(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
|
||||
return Decorate(ctx, inst, ctx.OpFAdd(ctx.f64[1], a, b));
|
||||
return Decorate(ctx, inst, ctx.OpFAdd(ctx.F64[1], a, b));
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitFPFma16(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c) {
|
||||
return Decorate(ctx, inst, ctx.OpFma(ctx.f16[1], a, b, c));
|
||||
return Decorate(ctx, inst, ctx.OpFma(ctx.F16[1], a, b, c));
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitFPFma32(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c) {
|
||||
return Decorate(ctx, inst, ctx.OpFma(ctx.f32[1], a, b, c));
|
||||
return Decorate(ctx, inst, ctx.OpFma(ctx.F32[1], a, b, c));
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitFPFma64(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c) {
|
||||
return Decorate(ctx, inst, ctx.OpFma(ctx.f64[1], a, b, c));
|
||||
return Decorate(ctx, inst, ctx.OpFma(ctx.F64[1], a, b, c));
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitFPMax32(EmitContext&) {
|
||||
|
|
@ -86,15 +86,15 @@ void EmitSPIRV::EmitFPMin64(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitFPMul16(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
|
||||
return Decorate(ctx, inst, ctx.OpFMul(ctx.f16[1], a, b));
|
||||
return Decorate(ctx, inst, ctx.OpFMul(ctx.F16[1], a, b));
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitFPMul32(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
|
||||
return Decorate(ctx, inst, ctx.OpFMul(ctx.f32[1], a, b));
|
||||
return Decorate(ctx, inst, ctx.OpFMul(ctx.F32[1], a, b));
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitFPMul64(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
|
||||
return Decorate(ctx, inst, ctx.OpFMul(ctx.f64[1], a, b));
|
||||
return Decorate(ctx, inst, ctx.OpFMul(ctx.F64[1], a, b));
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitFPNeg16(EmitContext&) {
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ Id EmitSPIRV::EmitIAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b) {
|
|||
if (inst->HasAssociatedPseudoOperation()) {
|
||||
throw NotImplementedException("Pseudo-operations on IAdd32");
|
||||
}
|
||||
return ctx.OpIAdd(ctx.u32[1], a, b);
|
||||
return ctx.OpIAdd(ctx.U32[1], a, b);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitIAdd64(EmitContext&) {
|
||||
|
|
@ -18,7 +18,7 @@ void EmitSPIRV::EmitIAdd64(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitISub32(EmitContext& ctx, Id a, Id b) {
|
||||
return ctx.OpISub(ctx.u32[1], a, b);
|
||||
return ctx.OpISub(ctx.U32[1], a, b);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitISub64(EmitContext&) {
|
||||
|
|
@ -26,7 +26,7 @@ void EmitSPIRV::EmitISub64(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitIMul32(EmitContext& ctx, Id a, Id b) {
|
||||
return ctx.OpIMul(ctx.u32[1], a, b);
|
||||
return ctx.OpIMul(ctx.U32[1], a, b);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitINeg32(EmitContext&) {
|
||||
|
|
@ -38,7 +38,7 @@ void EmitSPIRV::EmitIAbs32(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift) {
|
||||
return ctx.OpShiftLeftLogical(ctx.u32[1], base, shift);
|
||||
return ctx.OpShiftLeftLogical(ctx.U32[1], base, shift);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitShiftRightLogical32(EmitContext&) {
|
||||
|
|
@ -70,11 +70,11 @@ void EmitSPIRV::EmitBitFieldSExtract(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitBitFieldUExtract(EmitContext& ctx, Id base, Id offset, Id count) {
|
||||
return ctx.OpBitFieldUExtract(ctx.u32[1], base, offset, count);
|
||||
return ctx.OpBitFieldUExtract(ctx.U32[1], base, offset, count);
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs) {
|
||||
return ctx.OpSLessThan(ctx.u1, lhs, rhs);
|
||||
return ctx.OpSLessThan(ctx.U1, lhs, rhs);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitULessThan(EmitContext&) {
|
||||
|
|
@ -94,7 +94,7 @@ void EmitSPIRV::EmitULessThanEqual(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitSGreaterThan(EmitContext& ctx, Id lhs, Id rhs) {
|
||||
return ctx.OpSGreaterThan(ctx.u1, lhs, rhs);
|
||||
return ctx.OpSGreaterThan(ctx.U1, lhs, rhs);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitUGreaterThan(EmitContext&) {
|
||||
|
|
@ -110,7 +110,7 @@ void EmitSPIRV::EmitSGreaterThanEqual(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs) {
|
||||
return ctx.OpUGreaterThanEqual(ctx.u1, lhs, rhs);
|
||||
return ctx.OpUGreaterThanEqual(ctx.U1, lhs, rhs);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitLogicalOr(EmitContext&) {
|
||||
|
|
|
|||
|
|
@ -2,10 +2,26 @@
|
|||
// Licensed under GPLv2 or any later version
|
||||
// Refer to the license.txt file included.
|
||||
|
||||
#include <bit>
|
||||
|
||||
#include "shader_recompiler/backend/spirv/emit_spirv.h"
|
||||
|
||||
namespace Shader::Backend::SPIRV {
|
||||
|
||||
static Id StorageIndex(EmitContext& ctx, const IR::Value& offset, size_t element_size) {
|
||||
if (offset.IsImmediate()) {
|
||||
const u32 imm_offset{static_cast<u32>(offset.U32() / element_size)};
|
||||
return ctx.Constant(ctx.U32[1], imm_offset);
|
||||
}
|
||||
const u32 shift{static_cast<u32>(std::countr_zero(element_size))};
|
||||
const Id index{ctx.Def(offset)};
|
||||
if (shift == 0) {
|
||||
return index;
|
||||
}
|
||||
const Id shift_id{ctx.Constant(ctx.U32[1], shift)};
|
||||
return ctx.OpShiftRightLogical(ctx.U32[1], index, shift_id);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitLoadGlobalU8(EmitContext&) {
|
||||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
|
@ -79,11 +95,14 @@ void EmitSPIRV::EmitLoadStorageS16(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitLoadStorage32(EmitContext& ctx, const IR::Value& binding,
|
||||
[[maybe_unused]] const IR::Value& offset) {
|
||||
const IR::Value& offset) {
|
||||
if (!binding.IsImmediate()) {
|
||||
throw NotImplementedException("Storage buffer indexing");
|
||||
throw NotImplementedException("Dynamic storage buffer indexing");
|
||||
}
|
||||
return ctx.Name(ctx.OpUndef(ctx.u32[1]), "unimplemented_sbuf");
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
const Id pointer{ctx.OpAccessChain(ctx.storage_u32, ssbo, ctx.u32_zero_value, index)};
|
||||
return ctx.OpLoad(ctx.U32[1], pointer);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitLoadStorage64(EmitContext&) {
|
||||
|
|
@ -110,8 +129,15 @@ void EmitSPIRV::EmitWriteStorageS16(EmitContext&) {
|
|||
throw NotImplementedException("SPIR-V Instruction");
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitWriteStorage32(EmitContext& ctx) {
|
||||
ctx.Name(ctx.OpUndef(ctx.u32[1]), "unimplemented_sbuf_store");
|
||||
void EmitSPIRV::EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding,
|
||||
const IR::Value& offset, Id value) {
|
||||
if (!binding.IsImmediate()) {
|
||||
throw NotImplementedException("Dynamic storage buffer indexing");
|
||||
}
|
||||
const Id ssbo{ctx.ssbos[binding.U32()]};
|
||||
const Id index{StorageIndex(ctx, offset, sizeof(u32))};
|
||||
const Id pointer{ctx.OpAccessChain(ctx.storage_u32, ssbo, ctx.u32_zero_value, index)};
|
||||
ctx.OpStore(pointer, value);
|
||||
}
|
||||
|
||||
void EmitSPIRV::EmitWriteStorage64(EmitContext&) {
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
namespace Shader::Backend::SPIRV {
|
||||
|
||||
Id EmitSPIRV::EmitUndefU1(EmitContext& ctx) {
|
||||
return ctx.OpUndef(ctx.u1);
|
||||
return ctx.OpUndef(ctx.U1);
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitUndefU8(EmitContext&) {
|
||||
|
|
@ -19,7 +19,7 @@ Id EmitSPIRV::EmitUndefU16(EmitContext&) {
|
|||
}
|
||||
|
||||
Id EmitSPIRV::EmitUndefU32(EmitContext& ctx) {
|
||||
return ctx.OpUndef(ctx.u32[1]);
|
||||
return ctx.OpUndef(ctx.U32[1]);
|
||||
}
|
||||
|
||||
Id EmitSPIRV::EmitUndefU64(EmitContext&) {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue