shader: Make typed IR
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parent
dc04a50ac2
commit
be94ee88d2
19 changed files with 494 additions and 268 deletions
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@ -5,6 +5,7 @@
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#include <algorithm>
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#include <type_traits>
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#include "common/bit_cast.h"
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#include "common/bit_util.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/ir/microinstruction.h"
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@ -25,6 +26,8 @@ template <typename T>
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return value.U1();
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} else if constexpr (std::is_same_v<T, u32>) {
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return value.U32();
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} else if constexpr (std::is_same_v<T, f32>) {
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return value.F32();
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} else if constexpr (std::is_same_v<T, u64>) {
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return value.U64();
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}
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@ -115,6 +118,19 @@ void FoldLogicalAnd(IR::Inst& inst) {
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}
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}
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template <typename Dest, typename Source>
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void FoldBitCast(IR::Inst& inst, IR::Opcode reverse) {
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const IR::Value value{inst.Arg(0)};
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if (value.IsImmediate()) {
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inst.ReplaceUsesWith(IR::Value{Common::BitCast<Dest>(Arg<Source>(value))});
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return;
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}
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IR::Inst* const arg_inst{value.InstRecursive()};
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if (value.InstRecursive()->Opcode() == reverse) {
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inst.ReplaceUsesWith(arg_inst->Arg(0));
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}
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}
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void ConstantPropagation(IR::Inst& inst) {
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switch (inst.Opcode()) {
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case IR::Opcode::GetRegister:
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@ -123,6 +139,10 @@ void ConstantPropagation(IR::Inst& inst) {
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return FoldGetPred(inst);
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case IR::Opcode::IAdd32:
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return FoldAdd<u32>(inst);
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case IR::Opcode::BitCastF32U32:
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return FoldBitCast<f32, u32>(inst, IR::Opcode::BitCastU32F32);
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case IR::Opcode::BitCastU32F32:
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return FoldBitCast<u32, f32>(inst, IR::Opcode::BitCastF32U32);
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case IR::Opcode::IAdd64:
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return FoldAdd<u64>(inst);
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case IR::Opcode::BitFieldUExtract:
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@ -108,8 +108,8 @@ bool MeetsBias(const StorageBufferAddr& storage_buffer, const Bias& bias) noexce
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storage_buffer.offset < bias.offset_end;
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}
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/// Ignores a global memory operation, reads return zero and writes are ignored
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void IgnoreGlobalMemory(IR::Block& block, IR::Block::iterator inst) {
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/// Discards a global memory operation, reads return zero and writes are ignored
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void DiscardGlobalMemory(IR::Block& block, IR::Block::iterator inst) {
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const IR::Value zero{u32{0}};
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switch (inst->Opcode()) {
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case IR::Opcode::LoadGlobalS8:
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@ -120,12 +120,12 @@ void IgnoreGlobalMemory(IR::Block& block, IR::Block::iterator inst) {
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inst->ReplaceUsesWith(zero);
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break;
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case IR::Opcode::LoadGlobal64:
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inst->ReplaceUsesWith(
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IR::Value{&*block.PrependNewInst(inst, IR::Opcode::CompositeConstruct2, {zero, zero})});
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inst->ReplaceUsesWith(IR::Value{
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&*block.PrependNewInst(inst, IR::Opcode::CompositeConstructU32x2, {zero, zero})});
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break;
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case IR::Opcode::LoadGlobal128:
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inst->ReplaceUsesWith(IR::Value{&*block.PrependNewInst(
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inst, IR::Opcode::CompositeConstruct4, {zero, zero, zero, zero})});
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inst, IR::Opcode::CompositeConstructU32x4, {zero, zero, zero, zero})});
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break;
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case IR::Opcode::WriteGlobalS8:
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case IR::Opcode::WriteGlobalU8:
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@ -137,7 +137,8 @@ void IgnoreGlobalMemory(IR::Block& block, IR::Block::iterator inst) {
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inst->Invalidate();
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break;
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default:
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throw LogicError("Invalid opcode to ignore its global memory operation {}", inst->Opcode());
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throw LogicError("Invalid opcode to discard its global memory operation {}",
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inst->Opcode());
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}
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}
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@ -196,7 +197,7 @@ void CollectStorageBuffers(IR::Block& block, IR::Block::iterator inst,
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storage_buffer = Track(addr, nullptr);
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if (!storage_buffer) {
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// If that also failed, drop the global memory usage
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IgnoreGlobalMemory(block, inst);
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DiscardGlobalMemory(block, inst);
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}
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}
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// Collect storage buffer and the instruction
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@ -242,12 +243,12 @@ std::optional<IR::U32> TrackLowAddress(IR::IREmitter& ir, IR::Inst* inst) {
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if (vector.IsImmediate()) {
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return std::nullopt;
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}
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// This vector is expected to be a CompositeConstruct2
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// This vector is expected to be a CompositeConstructU32x2
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IR::Inst* const vector_inst{vector.InstRecursive()};
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if (vector_inst->Opcode() != IR::Opcode::CompositeConstruct2) {
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if (vector_inst->Opcode() != IR::Opcode::CompositeConstructU32x2) {
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return std::nullopt;
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}
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// Grab the first argument from the CompositeConstruct2, this is the low address.
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// Grab the first argument from the CompositeConstructU32x2, this is the low address.
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// Re-apply the offset in case we found one.
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const IR::U32 low_addr{vector_inst->Arg(0)};
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return imm_offset != 0 ? IR::U32{ir.IAdd(low_addr, ir.Imm32(imm_offset))} : low_addr;
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