glasm: Rework control flow introducing a syntax list
This commit regresses VertexA shaders, their transformation pass has to be adapted to the new control flow.
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7ff5851608
commit
d54d7de40e
33 changed files with 437 additions and 505 deletions
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@ -61,25 +61,28 @@ F64 IREmitter::Imm64(f64 value) const {
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return F64{Value{value}};
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}
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void IREmitter::Branch(Block* label) {
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label->AddImmediatePredecessor(block);
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block->SetBranch(label);
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Inst(Opcode::Branch, label);
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void IREmitter::Prologue() {
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Inst(Opcode::Prologue);
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}
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void IREmitter::BranchConditional(const U1& condition, Block* true_label, Block* false_label) {
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block->SetBranches(IR::Condition{true}, true_label, false_label);
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true_label->AddImmediatePredecessor(block);
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false_label->AddImmediatePredecessor(block);
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Inst(Opcode::BranchConditional, condition, true_label, false_label);
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void IREmitter::Epilogue() {
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Inst(Opcode::Epilogue);
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}
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void IREmitter::LoopMerge(Block* merge_block, Block* continue_target) {
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Inst(Opcode::LoopMerge, merge_block, continue_target);
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void IREmitter::BranchConditionRef(const U1& cond) {
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Inst(Opcode::BranchConditionRef, cond);
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}
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void IREmitter::SelectionMerge(Block* merge_block) {
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Inst(Opcode::SelectionMerge, merge_block);
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void IREmitter::DemoteToHelperInvocation() {
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Inst(Opcode::DemoteToHelperInvocation);
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}
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void IREmitter::EmitVertex(const U32& stream) {
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Inst(Opcode::EmitVertex, stream);
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}
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void IREmitter::EndPrimitive(const U32& stream) {
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Inst(Opcode::EndPrimitive, stream);
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}
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void IREmitter::Barrier() {
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@ -94,37 +97,6 @@ void IREmitter::DeviceMemoryBarrier() {
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Inst(Opcode::DeviceMemoryBarrier);
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}
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void IREmitter::Return() {
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block->SetReturn();
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Inst(Opcode::Return);
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}
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void IREmitter::Unreachable() {
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Inst(Opcode::Unreachable);
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}
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void IREmitter::DemoteToHelperInvocation(Block* continue_label) {
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block->SetBranch(continue_label);
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continue_label->AddImmediatePredecessor(block);
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Inst(Opcode::DemoteToHelperInvocation, continue_label);
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}
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void IREmitter::Prologue() {
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Inst(Opcode::Prologue);
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}
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void IREmitter::Epilogue() {
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Inst(Opcode::Epilogue);
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}
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void IREmitter::EmitVertex(const U32& stream) {
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Inst(Opcode::EmitVertex, stream);
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}
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void IREmitter::EndPrimitive(const U32& stream) {
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Inst(Opcode::EndPrimitive, stream);
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}
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U32 IREmitter::GetReg(IR::Reg reg) {
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return Inst<U32>(Opcode::GetRegister, reg);
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}
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