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shader: FMUL, select, RRO, and MUFU fixes

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This commit is contained in:
ReinUsesLisp 2021-02-22 22:59:16 -03:00 • committed by ameerj
parent 18a766b362
commit e44752ddc8
18 changed files with 507 additions and 119 deletions
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12
src/shader_recompiler/frontend/maxwell/translate/impl/impl.cpp
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@ -48,11 +48,11 @@ IR::U32 TranslatorVisitor::GetReg39(u64 insn) {
return X(reg.index);
}
IR::F32 TranslatorVisitor::GetRegFloat20(u64 insn) {
IR::F32 TranslatorVisitor::GetFloatReg20(u64 insn) {
return ir.BitCast<IR::F32>(GetReg20(insn));
}
IR::F32 TranslatorVisitor::GetRegFloat39(u64 insn) {
IR::F32 TranslatorVisitor::GetFloatReg39(u64 insn) {
return ir.BitCast<IR::F32>(GetReg39(insn));
}
@ -110,6 +110,14 @@ IR::U32 TranslatorVisitor::GetImm32(u64 insn) {
return ir.Imm32(static_cast<u32>(imm.value));
}
IR::F32 TranslatorVisitor::GetFloatImm32(u64 insn) {
union {
u64 raw;
BitField<20, 32, u64> value;
} const imm{insn};
return ir.Imm32(Common::BitCast<f32>(static_cast<u32>(imm.value)));
}
void TranslatorVisitor::SetZFlag(const IR::U1& value) {
ir.SetZFlag(value);
}