GPU: Don't mark uniform buffers and registers as used for instructions which don't have them.
Like the MOV32I and FMUL32I instructions. This fixes a potential crash when using these instructions.
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0e13d9cb7b
commit
eab7457c00
2 changed files with 18 additions and 14 deletions
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@ -852,11 +852,6 @@ private:
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break;
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}
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case OpCode::Id::MOV32_IMM: {
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// mov32i doesn't have abs or neg bits.
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regs.SetRegisterToFloat(instr.gpr0, 0, GetImmediate32(instr), 1, 1);
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break;
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}
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case OpCode::Id::FMUL_C:
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case OpCode::Id::FMUL_R:
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case OpCode::Id::FMUL_IMM: {
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@ -864,13 +859,6 @@ private:
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instr.alu.saturate_d);
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break;
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}
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case OpCode::Id::FMUL32_IMM: {
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// fmul32i doesn't have abs or neg bits.
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regs.SetRegisterToFloat(
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instr.gpr0, 0,
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regs.GetRegisterAsFloat(instr.gpr8) + " * " + GetImmediate32(instr), 1, 1);
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break;
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}
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case OpCode::Id::FADD_C:
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case OpCode::Id::FADD_R:
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case OpCode::Id::FADD_IMM: {
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@ -943,6 +931,21 @@ private:
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}
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break;
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}
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case OpCode::Type::ArithmeticImmediate: {
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switch (opcode->GetId()) {
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case OpCode::Id::MOV32_IMM: {
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regs.SetRegisterToFloat(instr.gpr0, 0, GetImmediate32(instr), 1, 1);
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break;
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}
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case OpCode::Id::FMUL32_IMM: {
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regs.SetRegisterToFloat(
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instr.gpr0, 0,
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regs.GetRegisterAsFloat(instr.gpr8) + " * " + GetImmediate32(instr), 1, 1);
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break;
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}
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}
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break;
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}
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case OpCode::Type::Bfe: {
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ASSERT_MSG(!instr.bfe.negate_b, "Unimplemented");
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