shader: Improve VOTE.VTG stub

This commit is contained in:
FernandoS27 2021-04-01 22:20:57 +02:00 committed by ameerj
parent 12f5f32098
commit ecb30c9072
7 changed files with 147 additions and 4 deletions

View file

@ -198,6 +198,38 @@ void IREmitter::SetOFlag(const U1& value) {
Inst(Opcode::SetOFlag, value);
}
U1 IREmitter::GetFCSMFlag() {
return Inst<U1>(Opcode::GetFCSMFlag);
}
U1 IREmitter::GetTAFlag() {
return Inst<U1>(Opcode::GetTAFlag);
}
U1 IREmitter::GetTRFlag() {
return Inst<U1>(Opcode::GetTRFlag);
}
U1 IREmitter::GetMXFlag() {
return Inst<U1>(Opcode::GetMXFlag);
}
void IREmitter::SetFCSMFlag(const U1& value) {
Inst(Opcode::SetFCSMFlag, value);
}
void IREmitter::SetTAFlag(const U1& value) {
Inst(Opcode::SetTAFlag, value);
}
void IREmitter::SetTRFlag(const U1& value) {
Inst(Opcode::SetTRFlag, value);
}
void IREmitter::SetMXFlag(const U1& value) {
Inst(Opcode::SetMXFlag, value);
}
static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) {
switch (flow_test) {
case FlowTest::F:
@ -256,13 +288,14 @@ static U1 GetFlowTest(IREmitter& ir, FlowTest flow_test) {
return ir.LogicalOr(ir.GetSFlag(), ir.GetZFlag());
case FlowTest::RGT:
return ir.LogicalAnd(ir.LogicalNot(ir.GetSFlag()), ir.LogicalNot(ir.GetZFlag()));
case FlowTest::FCSM_TR:
return ir.LogicalAnd(ir.GetFCSMFlag(), ir.GetTRFlag());
case FlowTest::CSM_TA:
case FlowTest::CSM_TR:
case FlowTest::CSM_MX:
case FlowTest::FCSM_TA:
case FlowTest::FCSM_TR:
case FlowTest::FCSM_MX:
return ir.Imm1(false);
default:
throw NotImplementedException("Flow test {}", flow_test);
}

View file

@ -70,6 +70,16 @@ public:
void SetCFlag(const U1& value);
void SetOFlag(const U1& value);
[[nodiscard]] U1 GetFCSMFlag();
[[nodiscard]] U1 GetTAFlag();
[[nodiscard]] U1 GetTRFlag();
[[nodiscard]] U1 GetMXFlag();
void SetFCSMFlag(const U1& value);
void SetTAFlag(const U1& value);
void SetTRFlag(const U1& value);
void SetMXFlag(const U1& value);
[[nodiscard]] U1 Condition(IR::Condition cond);
[[nodiscard]] U1 GetFlowTestResult(FlowTest test);

View file

@ -46,10 +46,18 @@ OPCODE(GetZFlag, U1, Void
OPCODE(GetSFlag, U1, Void, )
OPCODE(GetCFlag, U1, Void, )
OPCODE(GetOFlag, U1, Void, )
OPCODE(GetFCSMFlag, U1, Void, )
OPCODE(GetTAFlag, U1, Void, )
OPCODE(GetTRFlag, U1, Void, )
OPCODE(GetMXFlag, U1, Void, )
OPCODE(SetZFlag, Void, U1, )
OPCODE(SetSFlag, Void, U1, )
OPCODE(SetCFlag, Void, U1, )
OPCODE(SetOFlag, Void, U1, )
OPCODE(SetFCSMFlag, Void, U1, )
OPCODE(SetTAFlag, Void, U1, )
OPCODE(SetTRFlag, Void, U1, )
OPCODE(SetMXFlag, Void, U1, )
OPCODE(WorkgroupId, U32x3, )
OPCODE(LocalInvocationId, U32x3, )

View file

@ -50,7 +50,10 @@ void TranslatorVisitor::VOTE(u64 insn) {
}
void TranslatorVisitor::VOTE_vtg(u64) {
// Stub
// LOG_WARNING("VOTE.VTG: Stubbed!");
auto imm = ir.Imm1(false);
ir.SetFCSMFlag(imm);
ir.SetTRFlag(imm);
}
} // namespace Shader::Maxwell