Merge pull request #4391 from lioncash/nrvo
video_core: Allow copy elision to take place where applicable
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commit
f650cf8a9a
7 changed files with 26 additions and 26 deletions
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@ -1704,7 +1704,7 @@ std::string ARBDecompiler::HCastFloat(Operation operation) {
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}
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std::string ARBDecompiler::HUnpack(Operation operation) {
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const std::string operand = Visit(operation[0]);
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std::string operand = Visit(operation[0]);
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switch (std::get<Tegra::Shader::HalfType>(operation.GetMeta())) {
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case Tegra::Shader::HalfType::H0_H1:
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return operand;
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@ -2054,7 +2054,7 @@ std::string ARBDecompiler::InvocationId(Operation) {
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std::string ARBDecompiler::YNegate(Operation) {
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LOG_WARNING(Render_OpenGL, "(STUBBED)");
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const std::string temporary = AllocTemporary();
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std::string temporary = AllocTemporary();
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AddLine("MOV.F {}, 1;", temporary);
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return temporary;
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}
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@ -126,7 +126,7 @@ std::shared_ptr<Registry> MakeRegistry(const ShaderDiskCacheEntry& entry) {
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const VideoCore::GuestDriverProfile guest_profile{entry.texture_handler_size};
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const VideoCommon::Shader::SerializedRegistryInfo info{guest_profile, entry.bound_buffer,
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entry.graphics_info, entry.compute_info};
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const auto registry = std::make_shared<Registry>(entry.type, info);
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auto registry = std::make_shared<Registry>(entry.type, info);
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for (const auto& [address, value] : entry.keys) {
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const auto [buffer, offset] = address;
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registry->InsertKey(buffer, offset, value);
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@ -1919,7 +1919,7 @@ private:
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Expression Comparison(Operation operation) {
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static_assert(!unordered || type == Type::Float);
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const Expression expr = GenerateBinaryInfix(operation, op, Type::Bool, type, type);
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Expression expr = GenerateBinaryInfix(operation, op, Type::Bool, type, type);
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if constexpr (op.compare("!=") == 0 && type == Type::Float && !unordered) {
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// GLSL's operator!=(float, float) doesn't seem be ordered. This happens on both AMD's
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