Merge pull request #9112 from vonchenplus/deferred_draw
video_core: Reimplementing the maxwell drawing trigger mechanism
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commit
fa913a702f
10 changed files with 203 additions and 232 deletions
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@ -127,11 +127,10 @@ VkRect2D GetScissorState(const Maxwell& regs, size_t index, u32 up_scale = 1, u3
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return scissor;
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}
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DrawParams MakeDrawParams(const Maxwell& regs, u32 num_instances, bool is_instanced,
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bool is_indexed) {
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DrawParams MakeDrawParams(const Maxwell& regs, u32 num_instances, bool is_indexed) {
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DrawParams params{
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.base_instance = regs.global_base_instance_index,
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.num_instances = is_instanced ? num_instances : 1,
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.num_instances = num_instances,
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.base_vertex = is_indexed ? regs.global_base_vertex_index : regs.vertex_buffer.first,
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.num_vertices = is_indexed ? regs.index_buffer.count : regs.vertex_buffer.count,
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.first_index = is_indexed ? regs.index_buffer.first : 0,
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@ -177,7 +176,7 @@ RasterizerVulkan::RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra
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RasterizerVulkan::~RasterizerVulkan() = default;
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void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
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void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
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MICROPROFILE_SCOPE(Vulkan_Drawing);
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SCOPE_EXIT({ gpu.TickWork(); });
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@ -194,13 +193,15 @@ void RasterizerVulkan::Draw(bool is_indexed, bool is_instanced) {
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pipeline->SetEngine(maxwell3d, gpu_memory);
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pipeline->Configure(is_indexed);
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BindInlineIndexBuffer();
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BeginTransformFeedback();
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UpdateDynamicStates();
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const auto& regs{maxwell3d->regs};
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const u32 num_instances{maxwell3d->mme_draw.instance_count};
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const DrawParams draw_params{MakeDrawParams(regs, num_instances, is_instanced, is_indexed)};
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const u32 num_instances{instance_count};
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const DrawParams draw_params{MakeDrawParams(regs, num_instances, is_indexed)};
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scheduler.Record([draw_params](vk::CommandBuffer cmdbuf) {
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if (draw_params.is_indexed) {
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cmdbuf.DrawIndexed(draw_params.num_vertices, draw_params.num_instances,
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@ -1009,4 +1010,17 @@ void RasterizerVulkan::ReleaseChannel(s32 channel_id) {
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query_cache.EraseChannel(channel_id);
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}
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void RasterizerVulkan::BindInlineIndexBuffer() {
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if (maxwell3d->inline_index_draw_indexes.empty()) {
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return;
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}
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const auto data_count = static_cast<u32>(maxwell3d->inline_index_draw_indexes.size());
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auto buffer = buffer_cache_runtime.UploadStagingBuffer(data_count);
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std::memcpy(buffer.mapped_span.data(), maxwell3d->inline_index_draw_indexes.data(), data_count);
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buffer_cache_runtime.BindIndexBuffer(
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maxwell3d->regs.draw.topology, maxwell3d->regs.index_buffer.format,
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maxwell3d->regs.index_buffer.first, maxwell3d->regs.index_buffer.count, buffer.buffer,
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static_cast<u32>(buffer.offset), data_count);
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}
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} // namespace Vulkan
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@ -64,7 +64,7 @@ public:
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StateTracker& state_tracker_, Scheduler& scheduler_);
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~RasterizerVulkan() override;
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void Draw(bool is_indexed, bool is_instanced) override;
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void Draw(bool is_indexed, u32 instance_count) override;
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void Clear() override;
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void DispatchCompute() override;
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void ResetCounter(VideoCore::QueryType type) override;
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@ -141,6 +141,8 @@ private:
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void UpdateVertexInput(Tegra::Engines::Maxwell3D::Regs& regs);
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void BindInlineIndexBuffer();
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Tegra::GPU& gpu;
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ScreenInfo& screen_info;
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